Quasi-Cyclic Irregular LDPC Code Structure for Low-Complexity Error Correction
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Solution Overview
Problem
Existing data transmission and storage systems face challenges in reliably reproducing data due to noise corruption, particularly in high-speed networks, where traditional error-correcting codes are complex and costly to implement, and there is a need for more efficient error correction methods.
Innovation Solution
A device and method for generating quasi-cyclic irregular low-density parity check (LDPC) codes using supernodes, which split into derived symbols and connect to check nodes with specific edge distributions, allowing for the creation of a sparse quasi-cyclic parity check matrix, enabling efficient error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error-correcting codes are used to combat noise in high-speed networks, then error correction capability is improved, but device complexity and implementation cost increase
Solution Approach 1:
The code structure is segmented into quasi-cyclic blocks where the parity check matrix H is divided into submatrices with cyclic structures. This segmentation allows the decoder to process errors in structured groups rather than handling the entire code block monolithically, reducing computational complexity while maintaining error correction capability.
Solution Approach 2:
The invention changes the structural parameters of the error-correcting code by using quasi-cyclic LDPC codes with specific density and cycle properties. By adjusting the parity check matrix parameters (density, cycle length, quasi-cyclic block size), the system achieves optimal error correction performance with reduced implementation complexity compared to traditional codes.
2Device complexity
If regular LDPC codes are used for error correction, then implementation is simplified, but error-correcting performance in noisy environments deteriorates
Solution Approach 1:
The invention applies local quality by creating irregular LDPC codes where different portions of the code have different properties. Specifically, some symbol nodes have different degrees (number of connections to check nodes), allowing certain parts of the code to be optimized for error correction while others maintain simplicity. This local variation in node degrees improves performance without significantly increasing overall complexity.
Solution Approach 2:
The quasi-cyclic irregular LDPC code combines multiple structural properties: quasi-cyclic structure from regular codes (for implementation simplicity) and irregular degree distributions (for improved performance). This composite code structure integrates the advantages of both regular and irregular codes, achieving good error correction performance with manageable implementation complexity.
Data Source
AI summary
A device includes a supernode generator module, a supernode splitting module, and a control module. The supernode generator module generates S supernodes each comprising d symbol nodes, where S and d are integers greater than 1. The supernode splitting module splits each of the S supernodes into d derived symbols, wherein a total number of symbol edges of the d derived symbols is equal to a predetermined number of symbol edges of each of the S supernodes. The control module generates a quasi-cyclic irregular low density parity check (LDPC) code based on S*d derived symbols, wherein S equals the S supernodes and d equals the d derived symbols.