QC-LDPC Convolutional Coding for Low-Power High-Throughput Decoding
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Solution Overview
Problem
Current LDPC codes face challenges in achieving low power consumption and high throughput due to high hardware complexity and latency, especially in battery-powered devices, and have limited granularity in block sizes, leading to poor Frame-Error-Rate (FER) performance and increased power consumption.
Innovation Solution
The development of a low-power, high-throughput QC-LDPC convolutional encoder and decoder that utilizes small and fixed values for (C-B) and medium m_s matrices, enabling efficient implementation with medium granularity and low iterations, supporting both Belief Propagation and Trellis-based decoding, while allowing for systematic and non-systematic codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional LDPC codes are used with high hardware complexity to achieve good error correction performance, then reliability is improved, but power consumption increases and throughput decreases
Solution Approach 1:
The patent changes key parameters of the LDPC code structure by using QC-LDPC convolutional codes with specific matrix dimensions (medium m_s matrices with small and fixed C-B values). This parameter optimization enables the code to achieve good error correction performance while reducing the hardware complexity and power consumption required for implementation.
Solution Approach 2:
The patent employs a flexible encoder architecture that can operate in different modes (systematic and non-systematic codes) and supports both Belief Propagation and Trellis-based decoding. This dynamic adaptability allows the system to optimize between performance and power consumption based on specific application requirements.
2Reliability
If traditional LDPC codes are used with high hardware complexity to achieve good error correction performance, then reliability is improved, but productivity decreases
Solution Approach 1:
The patent optimizes code parameters by using QC-LDPC convolutional codes with medium granularity and low iterations, which reduces the computational burden while maintaining error correction performance. This enables higher throughput and processing rates without sacrificing reliability.
Solution Approach 2:
The patent structures the code with medium granularity, dividing the processing into manageable segments that can be handled efficiently by the encoder/decoder. This segmentation approach improves processing rate and reduces latency while maintaining good error correction performance.
3Device complexity
If limited granularity in block sizes is used, then device complexity is reduced, but reliability worsens due to poor FER performance
Solution Approach 1:
The patent identifies and optimizes specific parameters including syndrome former granularity Z rate, row weight, column weight, and block code rate. These parameter changes enable the system to achieve good FER performance with medium granularity, balancing device complexity and reliability.
Data Source
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AI summary
A low-density parity check (LDPC) encoder and input configured to receive an incoming signal stream. The encoder generates, from a block code H-matrix comprising a data portion and a parity check portion, a continuous H-matrix by concatenating the data portion into successive, recurring, data blocks that are separated by a specified symbol interval, and performs LDPC encoding of each data portion using the parity check portion associated with the data portion using its associated parity check portion. Additionally, a Trellis-based low-density parity check (LDPC) decoder configured to receive an encoded stream and decode the received signal to recover the signal stream.