Non-Binary QC-LDPC Encoder Matrix Layout for Low-Complexity Parallel Coding
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Solution Overview
Problem
Existing non-binary quasi-cyclic LDPC encoders face challenges in achieving low complexity operations while maintaining parallel processing performance and improved error correction capabilities.
Innovation Solution
The proposed LDPC encoder employs a parity check matrix with specific sub-matrix arrangements and scaling elements, allowing for reduced complexity in calculations by using inverse matrices with a certain pattern, while ensuring improved error correction performance through closely connected parity bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional parity check matrix is used in non-binary quasi-cyclic LDPC encoding, then parallel processing performance can be maintained, but calculation complexity remains high and error correction capability is limited
Solution Approach 1:
The patent transforms the parity check matrix by applying permutation operations and scaling transformations to create a structured form where non-zero sub-matrices follow specific patterns. This parameter transformation enables the use of inverse matrices with predictable structures, reducing calculation complexity while maintaining error correction performance through the preserved algebraic properties of the transformed matrix
Solution Approach 2:
The parity check matrix is divided into multiple sub-matrices arranged in a quasi-cyclic structure, where each sub-matrix operates independently or semi-independently. This segmentation allows parallel processing of different sub-matrix blocks while the overall structured arrangement enables simplified inverse matrix calculations, simultaneously improving parallel performance and reducing complexity
2Productivity
If calculation complexity is reduced through simplified matrix operations, then processing speed improves, but error correction performance may deteriorate
Solution Approach 1:
The patent applies specific permutation operations and scaling transformations to the parity check matrix that preserve the code's error correction capability while creating a structured form amenable to simplified calculations. The transformation maintains the essential algebraic properties needed for error correction while enabling efficient inverse matrix operations through the regularized structure
Solution Approach 2:
The patent creates a transformed version of the parity check matrix that copies the essential error correction properties of the original matrix while having a simplified structure. The inverse matrix of the transformed matrix can be computed more efficiently, and this copied structure enables faster processing without sacrificing the fundamental error correction capabilities embedded in the original code design
Data Source
AI summary
An LDPC encoder is described with memory for storing a parity check matrix and a calculation unit to encode information bits into a codeword with reference to the parity check matrix. The parity check matrix includes an information part matrix and a parity part matrix. In the parity part matrix, Z*Z sub-matrices are sub-matrices, other than a zero matrix, and are arranged in each of the m rows and m columns. A sub-matrix is a scaled cyclic matrix obtained by shifting elements of an identity matrix by one to the left and multiplying the shifted elements by a scaling element. Except for the scaled cyclic matrix, the remaining sub-matrices are a zero matrix or an identity matrix, and the scaling element is an element allowing the parity part matrix to satisfy a full rank condition on a Galois field.