QC-LDPC Parity-Check Matrix Layout for 2/3 Rate 7776-Bit Coding
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Solution Overview
Problem
Existing LDPC codes face challenges with high computational intensity due to high-density generator matrices, limiting their practical application, especially in wireless communication systems, and there is a need for improved encoding and decoding processes to support longer block lengths and higher code rates.
Innovation Solution
The implementation of quasi-cyclic low-density parity-check (QC-LDPC) codes with a block length of 7776 and a code rate of 2/3, utilizing a parity check matrix with a quasi-cyclic structure and Khatri-Rao lifting to generate efficient encoding and decoding processes, including the use of a binary matrix Γ to maintain full rank and optimize packet error performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-density generator matrices are used for LDPC encoding, then encoding capability is improved, but computational complexity increases significantly
Solution Approach 1:
The patent segments the generator matrix into multiple sub-matrices with specific structures (e.g., identity matrices, zero matrices, and structured sub-matrices). This segmentation allows the encoding process to be broken down into simpler operations that can be performed efficiently, reducing overall computational complexity while maintaining encoding capability.
Solution Approach 2:
The patent changes the structural parameters of the generator matrix by introducing specific patterns and constraints on the matrix elements. By parameterizing the matrix structure with variables and relationships, the system achieves both high encoding capability and reduced computational complexity through optimized matrix operations.
2Reliability
If longer block lengths are supported, then error correction performance is improved, but processing time increases
Solution Approach 1:
The patent divides the long block length into multiple smaller code blocks that can be processed in parallel. Each sub-block uses a structured generator matrix that enables efficient encoding, allowing the system to handle long blocks without proportionally increasing processing time through parallel processing capabilities.
Solution Approach 2:
The patent employs periodic structures in the generator matrix that enable repetitive, standardized encoding operations. This periodicity allows for optimized processing routines that can be applied consistently across different block lengths, reducing the time penalty associated with longer blocks.
3Productivity
If higher code rates are used, then data transmission efficiency is improved, but error correction capability deteriorates
Solution Approach 1:
The patent adjusts the parameters of the generator matrix to achieve higher code rates while maintaining error correction capability. By carefully designing the matrix structure with specific densities and patterns, the system optimizes the balance between code rate and error correction performance.
Solution Approach 2:
The patent applies different structural qualities to different parts of the generator matrix. Certain sub-matrices have higher density while others have lower density, creating local variations that enable the overall system to achieve high code rates in some regions while maintaining strong error correction capability in other regions.
Data Source
AI summary
An apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, according to a code rate of 2/3 and a code block size of 7776 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code, the first binary parity check matrix corresponding to a first exponent matrix. The one or more processors may be configured to encode data using the first binary parity check matrix. The transmitter may be configured to transmit the encoded data.