Quasi-Cyclic LDPC Matrix Configuration for Flexible Code Rates

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Solution Overview

Problem

The LDPC coding and decoding processes lack flexibility in terms of code rate and code length, which limits their adaptability to various communication standards and applications.

Innovation Solution

A quasi-cyclic LDPC coding and decoding method that determines a basic matrix from a mother basic matrix set, comprising first-type and second-type elements, allowing for flexible code length and rate adjustments based on preset parameters such as transport block size, application scenarios, and channel types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional LDPC coding is used with fixed code rates and lengths, then the coding and decoding processes are simple, but the adaptability to various communication standards and applications is limited

Engineering Contradiction:
Improveadaptability to various communication standards and applicationsVSAvoidcoding and decoding process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the basic matrix into multiple sub-matrices, where each sub-matrix can be independently configured with different cyclic shift values. This segmentation allows the system to support multiple code rates and lengths by selectively activating different sub-matrices, thereby improving adaptability without proportionally increasing overall complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic configurability by allowing the basic matrix structure to be adapted based on communication requirements. The cyclic shift values and sub-matrix configurations can be dynamically adjusted to match different code rates and lengths, enabling the same hardware structure to serve multiple communication standards.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If flexible code length and rate adjustments are implemented, then the adaptability improves, but the device complexity increases

Engineering Contradiction:
Improveflexibility of code length and rateVSAvoidLDPC coding and decoding apparatus complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs a universal basic matrix structure that can function across multiple code rates and lengths. By using a standardized sub-matrix framework with configurable cyclic shifts, the same apparatus can support various LDPC configurations without requiring separate hardware for each code rate or length, thus achieving flexibility without proportional complexity increase.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent achieves flexible code length and rate adjustments by changing parameters within the basic matrix structure, specifically the cyclic shift values and sub-matrix activations. These parameter changes allow the system to adapt to different communication requirements while maintaining the same underlying hardware architecture, avoiding the need for complex reconfiguration.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11637568B2Quasi-cyclic LDPC coding and decoding method and apparatus, and LDPC coder and decoder
Publication Date: 2023.04.25 ZTE CORP
  • US11637568B2 patent drawing
  • US11637568B2 patent drawing
  • US11637568B2 patent drawing

AI summary

A quasi-cyclic LDPC coding and decoding method and apparatus, and an LDPC coder and decoder. The method includes: determining from a mother basis matrix set a basis matrix used for low density parity check (LDPC) coding (S202), wherein the basis matrix used for LDPC coding includes a first-type element and a second-type element, the first-type element corresponds to an all-zero square matrix, the second-type element corresponds to a matrix obtained by means of a cyclic shift of a unit matrix according to a value of the second-type element, and dimensions of the all-zero square matrix and the unit matrix are equal; and performing LDPC coding on an information sequence to be coded according to the basis matrix used for LDPC coding, and/or performing LDPC decoding on a data sequence to be decoded according to the basis matrix used for LDPC coding (S204).