QC-LDPC PBCH Synchronization Using Cyclic Shift Timing

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Solution Overview

Problem

Existing wireless communication systems face complexity in time synchronization due to the need for careful design of synchronization signals and procedures, particularly in LTE systems, where detecting frame timing in the physical broadcast channel (PBCH) requires significant processing and complexity.

Innovation Solution

The use of quasi-cyclic low-density parity-check (QC-LDPC) codes for encoding and decoding the PBCH message, combined with cyclic shifts, simplifies the detection of frame timing by embedding timing information as a cyclic shift of codewords, allowing for reduced complexity in receivers through blind decoding and soft combining of multiple transmissions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional synchronization signals and procedures are used in LTE systems, then time synchronization can be achieved, but the complexity of frame timing detection in the physical broadcast channel (PBCH) increases significantly

Engineering Contradiction:
Improvetime synchronizationVSAvoidframe timing detection complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts frame timing information from the PBCH message content itself by using cyclic shifts of the encoded message. Instead of relying on separate synchronization signals, the timing information is embedded within the PBCH transmission through cyclic shifting, allowing the receiver to detect timing by analyzing the cyclic shift amount without requiring additional synchronization signal processing

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The PBCH message serves multiple functions simultaneously: it carries system information and embeds frame timing information through cyclic shifts. This multi-functionality eliminates the need for separate dedicated synchronization signals, reducing overall system complexity while maintaining reliable time synchronization

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If cyclic shifts are used to embed timing information in PBCH messages, then frame timing detection complexity is reduced, but the encoding and decoding process becomes more complex

Engineering Contradiction:
Improveframe timing detection complexityVSAvoidencoding and decoding implementation
Core Design Contradiction:
Device complexityVSEase of manufacture

Solution Approach 1:

The patent changes the cyclic shift parameter of the encoded PBCH message to embed timing information. By varying the cyclic shift amount according to the frame timing, the system encodes timing information in a way that requires modified encoding/decoding processes but simplifies the overall detection complexity through blind decoding approaches

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If blind decoding with cyclic shift analysis is used, then frame timing can be detected without explicit timing information, but the processing time and computational load increase

Engineering Contradiction:
Improveautomatic frame timing detectionVSAvoidprocessing time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent applies partial action by performing blind decoding with a limited set of predefined cyclic shift hypotheses rather than exhaustively searching all possible shifts. This approach achieves automatic frame timing detection without requiring complete analysis of all potential cyclic variations, thereby reducing processing time while maintaining detection accuracy

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8635517B2Methods and apparatus for fast synchronization using quasi-cyclic low-density parity-check (QC-LDPC) codes
Publication Date: 2014.01.21 SAMSUNG ELECTRONICS CO LTD
  • US8635517B2 patent drawing
  • US8635517B2 patent drawing
  • US8635517B2 patent drawing

AI summary

For use in a wireless communication network, a transmitter is configured to encode information. The transmitter includes a cyclic redundancy check (CRC) encoder configured to encode a physical broadcast channel (PBCH) message using a cyclic redundancy check. The transmitter also includes a timing dependent cyclic shift block configured to encode information in the PBCH message. The transmitter further includes a quasi-cyclic low-density parity-check (QC-LDPC) encoder configured to encode the PBCH message using a QC-LDPC.