QC-LDPC Rate Matching with Zero Insertion and Shortening

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Solution Overview

Problem

Current communication systems face challenges in achieving high transmission efficiency and reliability due to errors caused by noise, interference, and fading in mobile communication channels, particularly in supporting variable coding rates and minimizing coding complexity for LDPC codes.

Innovation Solution

The implementation of a Quasi-Cyclic Low Density Parity Check (QC-LDPC) code with a shortening scheme that allows for variable coding rates, optimizing the degree distribution and cycle length in the factor graph of the QC-LDPC code, and using a single parity check matrix to support multiple coding rates by inserting and removing '0' bits in the information data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single parity check matrix is used to support multiple coding rates, then adaptability is improved, but device complexity increases due to the need to manage variable coding rates

Engineering Contradiction:
Improvesupport for variable coding ratesVSAvoidcoding complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The information data is segmented by inserting zero bits at specific positions to create different coding rates from a single parity check matrix. The zero bits are inserted in units of columns corresponding to information bits, allowing the system to generate different effective coding rates without requiring multiple separate parity check matrices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The coding rate is adjusted by changing the parameter of zero bit insertion. By varying the number and positions of inserted zero bits, the system can dynamically change the effective coding rate while using the same underlying parity check matrix structure, thus achieving adaptability without proportionally increasing complexity.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If zero bits are inserted to achieve variable coding rates, then adaptability is improved, but loss of information increases due to the insertion of redundant zero bits

Engineering Contradiction:
Improvevariable coding rate supportVSAvoidinformation data efficiency
Core Design Contradiction:
Adaptability or versatilityVSLoss of information

Solution Approach 1:

The zero bits inserted for coding rate adjustment are systematically removed after the LDPC encoding process. The extractor identifies and removes the inserted zero bits from the encoded data, recovering the original information efficiency while maintaining the benefits of variable coding rate support during transmission.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Zero bits are inserted in advance before encoding to achieve the desired coding rate, and then removed after encoding. This preliminary insertion and subsequent removal strategy allows the system to temporarily use redundant bits for rate adaptation without permanently losing information efficiency.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the degree distribution and cycle length are optimized in the factor graph, then reliability is improved, but device complexity increases due to the optimization requirements

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The degree distribution and cycle length characteristics of the factor graph are dynamically optimized to improve error correction performance. By adjusting these parameters in the factor graph structure, the system achieves better reliability while managing the complexity through systematic optimization methods.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7890844B2Apparatus and method for transmitting/receiving signal in a communication system using low density parity check code
Publication Date: 2011.02.15 SAMSUNG ELECTRONICS CO LTD
  • US7890844B2 patent drawing
  • US7890844B2 patent drawing
  • US7890844B2 patent drawing

AI summary

An apparatus is provided for transmitting a signal in a communication system using a Low Density Parity Check (LDPC) code. A controller determines a number of ‘0’s to be inserted in information data according to a first coding rate to be applied when generating the information data into an LDPC code, and determines the number of ‘0’s to be removed from the LDPC code. A ‘0’ inserter inserts ‘0s’ in the information data according to control of the controller. An LDPC encoder generates the LDPC code by encoding the ‘0’-inserted signal according to a first parity check matrix. A ‘0’ remover removes the inserted ‘0’s from the LDPC code.