Quasi-Cyclic LDPC Matrix Layout for Tanner Graph Cycle Control
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Solution Overview
Problem
Current LDPC codes, particularly DVB-S2 LDPC codes, suffer from performance degradation due to poor cycle characteristics in the Tanner graph, leading to an error floor phenomenon at high Signal to Noise Ratios, and lack efficient methods for optimizing cycle characteristics.
Innovation Solution
A channel encoding/decoding apparatus and method are developed to design a quasi-cyclic LDPC code using a circulant permutation matrix, optimizing the parity-check matrix to improve cycle characteristics and enhance the Tanner graph performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If DVB-S2 LDPC codes are used for communication, then implementation complexity is reduced through quasi-cyclic structure, but cycle characteristics in the Tanner graph deteriorate leading to error floor phenomenon
Solution Approach 1:
The parity-check matrix is divided into multiple sub-matrices (information part and parity part), and further segmented into column groups. This segmentation allows independent optimization of different parts of the matrix, enabling improvement of cycle characteristics in specific regions while maintaining the overall quasi-cyclic structure for low implementation complexity.
Solution Approach 2:
Different parts of the parity-check matrix are assigned different structures and optimization strategies. The information part uses a specific column group structure with controlled column weights, while the parity part uses a different structure. This local differentiation allows optimization of cycle characteristics in critical areas without compromising the overall code performance and implementation efficiency.
2Ease of manufacture
If conventional LDPC codes are used, then implementation is simpler, but performance degrades at high Signal to Noise Ratios due to error floor phenomenon
Solution Approach 1:
The invention optimizes specific parameters of the parity-check matrix including column weights, row weights, and the distribution of ones in the matrix. By carefully controlling these parameters (e.g., setting specific column weights to 2 or 3, arranging ones in specific patterns), the code achieves better cycle characteristics and eliminates the error floor phenomenon while maintaining quasi-cyclic structure for simple implementation.
3Reliability
If the parity-check matrix is optimized for better cycle characteristics, then error floor phenomenon is reduced, but the design complexity increases
Solution Approach 1:
The invention establishes predetermined structures and patterns for the parity-check matrix before actual code generation. Column groups are pre-defined with specific structures, and the arrangement of ones follows predetermined rules. This preliminary structuring simplifies the design process by providing a framework that automatically ensures good cycle characteristics without requiring complex iterative optimization.
Solution Approach 2:
The invention uses repetitive patterns and structures within the parity-check matrix, such as repeating column group structures and using circulant matrices with specific properties. This copying approach ensures consistent cycle characteristics throughout the matrix while reducing design complexity, as once a good structure is found, it can be replicated across multiple sections of the matrix.
Data Source
AI summary
An apparatus and method for generating a parity-check matrix of a Low-Density Parity-Check (LDPC) code are provided. Parameters for designing the LDPC code are determined, and a first parity-check matrix of a quasi-cyclic LDPC code is formed according to the determined parameters. A second parity-check matrix is created through the elimination of a predetermined portion of a parity part in the first parity-check matrix, and a third parity-check matrix is created by rearranging the second parity-check matrix.