Quantum Cascade Laser Substrate Bonding for Better Heat Extraction
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Solution Overview
Problem
Existing techniques for thermal management in quantum cascade lasers (QCLs) and QCL-based photonic integrated circuits (PICs) are not entirely satisfactory due to high thermal resistance and complex, low-throughput epi-down mounting processes.
Innovation Solution
The use of a high-thermal-conductivity foreign substrate, such as SiC, replacing the native substrate through wafer bonding methods, combined with epi-up mounting configurations, to improve vertical heat extraction and reduce thermal resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If epi-down mounting process is used to improve heat extraction, then thermal management performance is improved, but manufacturing complexity increases and throughput decreases
Solution Approach 1:
The patent inverts the conventional epi-down mounting approach by using epi-up mounting configuration. Instead of mounting the QCL with the epitaxial side down to achieve thermal contact, the patent mounts the device with the epitaxial side up, allowing the substrate to be removed and replaced with a high-thermal-conductivity substrate, thereby achieving both simplified manufacturing and improved thermal management.
Solution Approach 2:
The patent extracts the native substrate from the QCL device structure after epitaxial growth. By removing the native substrate and replacing it with a high-thermal-conductivity substrate through wafer bonding, the patent separates the functions of substrate support (performed by the high-thermal-conductivity substrate) and thermal management, achieving improved heat extraction without complex mounting processes.
2Temperature
If epi-down mounting process is used to improve heat extraction, then thermal management performance is improved, but manufacturing yield decreases
Solution Approach 1:
The patent inverts the conventional epi-down mounting approach by using epi-up mounting configuration. Instead of mounting the QCL with the epitaxial side down to achieve thermal contact, the patent mounts the device with the epitaxial side up, allowing the substrate to be removed and replaced with a high-thermal-conductivity substrate, thereby achieving both simplified manufacturing and improved thermal management.
Solution Approach 2:
The patent performs wafer bonding to a carrier substrate before removing the native substrate. This preliminary action provides mechanical support and stability during the substrate removal process, preventing device damage and improving manufacturing yield. The carrier substrate serves as a temporary support structure that is removed after the high-thermal-conductivity substrate is bonded.
3Ease of manufacture
If native substrate is used for QCL fabrication, then manufacturing process is simple, but thermal resistance is high
Solution Approach 1:
The patent introduces a high-thermal-conductivity substrate as an intermediary between the QCL active region and the heat sink. This intermediary substrate with superior thermal conductivity properties enables efficient heat extraction from the device, overcoming the thermal resistance limitation of the native substrate while maintaining a relatively simple wafer-level bonding process.
Solution Approach 2:
The patent changes the thermal conductivity parameter of the substrate by replacing the native substrate with a high-thermal-conductivity substrate. This parameter change fundamentally improves the thermal management performance of the device, reducing thermal resistance and enabling better heat extraction without significantly complicating the manufacturing process.
4Temperature
If high-thermal-conductivity foreign substrate is used, then thermal resistance is reduced, but manufacturing process complexity increases
Solution Approach 1:
The patent performs wafer bonding to a carrier substrate before removing the native substrate. This preliminary action provides mechanical support and stability during the substrate removal process, preventing device damage and improving manufacturing yield. The carrier substrate serves as a temporary support structure that is removed after the high-thermal-conductivity substrate is bonded.
Solution Approach 2:
The patent introduces a high-thermal-conductivity substrate as an intermediary between the QCL active region and the heat sink. This intermediary substrate with superior thermal conductivity properties enables efficient heat extraction from the device, overcoming the thermal resistance limitation of the native substrate while maintaining a relatively simple wafer-level bonding process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in thermal resistance comparable to or better than epi-down mounted devices on native substrates, while simplifying the manufacturing process and increasing yield by avoiding the complexities of epi-down mounting.
Implementation Method 1
the substrates and material systems used to fabricate QCLs and QCL-PICs generally have much lower thermal conductivity than that of other available crystalline wafer materials
Implementation Method 2
bonding a first wafer, the first wafer including a native substrate and a plurality of epitaxial layers (epilayers) disposed over the native substrate, to a second wafer, the second wafer including a foreign substrate
Data Source
AI summary
Structures and methods for reducing the thermal resistance of quantum cascade laser (QCL) devices and QCL-based photonic integrated circuits (QCL-PIC) are provided, wherein, in various embodiments, the native substrate of QCL and QCL-PIC devices is replaced with a foreign substrate that has very high thermal conductivity, for example, using wafer bonding methods. In some examples, wafer bonding of processed, semi-processed, or unprocessed QCL and QCL-PIC epilayers or devices on their native substrate to a high-thermal-conductivity substrate is performed, followed by removal of the native substrate via selective etching, and performing additional device processing if necessary. Thereafter, in some embodiments, cleaving or dicing individual devices from the bonded wafers may be performed, for example, for mounting onto heat sinks.