QC-LDPC Bit Interleaving for Spatial Multiplexing Reception

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Solution Overview

Problem

Current communication systems using bit-interleaved coding and modulation (BICM) with quasi-cyclic low-density parity-check (QC-LDPC) codes and spatial multiplexing face challenges in optimizing the mapping of codeword bits onto constellation words, leading to suboptimal reception performance.

Innovation Solution

An interleaving method and interleaver design that permute codeword bits based on QC-LDPC codes to map them optimally onto constellation words in spatial-multiplexing blocks, ensuring each constellation word is composed of bits from different cyclic blocks and matching robustness levels with importance levels, thereby improving reception performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional mapping methods are used to map codeword bits onto constellation words, then the system structure remains simple, but the reception performance is suboptimal

Engineering Contradiction:
Improvereception performanceVSAvoidinterleaving structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interleaver divides the codeword bits into multiple sections, where each section contains bits from different cyclic blocks. This segmentation allows systematic mapping of bits with different robustness levels to constellation words, improving reception performance while maintaining manageable system complexity through structured organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different mapping strategies to different sections of the codeword. Each section is composed of bits from specific cyclic blocks with particular robustness characteristics, allowing optimized local mapping that matches bit reliability to constellation word positions, thereby improving overall system reliability without uniformly complicating the entire system.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If bit permutation is applied to optimize mapping, then bit error rate performance improves, but the processing complexity increases

Engineering Contradiction:
Improvebit error rate performanceVSAvoidpermutation processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The interleaver performs bit permutation in advance, organizing codeword bits into sections with specific robustness characteristics before mapping to constellation words. This preliminary organization optimizes the mapping process and improves bit error rate performance, while the structured approach keeps processing complexity manageable through pre-defined permutation patterns.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP2615738B1Interleaving method and deinterleaving method
Publication Date: 2015.12.09 SUN PATENT TRUST
  • EP2615738B1 patent drawingFigure 1
  • EP2615738B1 patent drawingFigure 2
  • EP2615738B1 patent drawingFigure 3

AI summary

An interleaving method performed by a transmitter for a communication system with quasi-cyclic low-density parity-check codes, spatial multiplexing, and T transmit antennas is used for applying permutation to N cyclic blocks of a codeword in order to map bits of the permutated cyclic blocks onto T constellation words constituting multiple spatial-multiplexing blocks from the codeword. Each cyclic block consists of Q bits.