QC-LDPC Decoder Error Counting During Iterative Decoding

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Solution Overview

Problem

Existing ECC decoding methods introduce significant latency when calculating the number of errors corrected in long code words, as they require counting differences over the entire code word after convergence, which can be time-consuming and inefficient.

Innovation Solution

The proposed solution involves a decoder that spreads the error count evaluation task over decoding iterations and processes multiple subsets of the code word, calculating count updates incrementally during iterative decoding, allowing for no processing latency after convergence to a valid code word.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If error count calculation is performed after convergence over the entire code word, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
Improveerror count accuracyVSAvoidcalculation latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The code word is divided into multiple layers, each processed independently during iterative decoding. The error count calculation is segmented into per-layer count updates that are accumulated to produce the total error count, allowing incremental computation without waiting for complete convergence

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The error count calculation is performed preliminarily during each iteration of the decoding process rather than waiting until convergence. Count updates are generated and accumulated in real-time during iterative processing, eliminating post-convergence calculation latency

Inventive Principle:
Principle #10Preliminary action

2Productivity

If iterative decoding processes multiple layers with count updates, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improvedecoding speedVSAvoiddecoder structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The decoder circuitry is designed to perform multiple functions: it processes multiple layers of the code word, generates count updates for error tracking, and accumulates these updates to produce total error counts. This multi-functional approach integrates error measurement capability into the existing decoding architecture without requiring separate dedicated hardware

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The error counting mechanism is nested within the iterative decoding structure. Count updates are generated as part of the layer processing operation, and the accumulation of these updates is nested within the overall decoding workflow, allowing error measurement to occur within the existing decoding iterations without adding external processing stages

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS9853661B2On-the-fly evaluation of the number of errors corrected in iterative ECC decoding
Publication Date: 2017.12.26 APPLE INC
  • US9853661B2 patent drawing
  • US9853661B2 patent drawing
  • US9853661B2 patent drawing

AI summary

A decoder includes an interface and circuitry. The interface is configured to receive a code word that was encoded using a Quasi-Cyclic Low Density Parity Check (QC-LDPC) Error Correcting Code (ECC) represented by multiple check equations that are defined over multiple variables. The circuitry is configured to decode the code word by iteratively processing multiple layers that each includes a respective subset of the variables of the code word, and producing per each layer one or more count updates, and to generate a total number of errors corrected over the entire code word by accumulating the count updates.