QC-LDPC Bit Interleaving with Folding-Section Parallel Mapping
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Solution Overview
Problem
Existing bit-interleaved coding and modulation systems with quasi-cyclic low-density parity-check codes face inefficiencies in interleaving, leading to impaired parallelism and increased latency, particularly in iterative decoding processes, due to limitations in the number of cyclic blocks and column twisting in the bit interleaver configurations.
Innovation Solution
A bit interleaving method that maps M bits of each constellation to M different cyclic blocks and ensures all constellation words are mapped to only one cyclic block, optimizing the interleaver into N/M parallel sections with section permutations, and applying cyclic block permutations to improve mapping efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional bit interleaving is applied to QC LDPC codes, then the system can process codewords, but parallelism is impaired and latency increases
Solution Approach 1:
The patent divides the bit interleaving process into N/M parallel sections, where each section independently processes specific cyclic blocks. This segmentation enables concurrent processing of multiple codeword segments simultaneously, improving parallelism and reducing the overall processing latency while maintaining interleaving effectiveness
2Productivity
If the number of cyclic blocks is limited, then the code structure is simplified, but mapping efficiency and parallelism are reduced
Solution Approach 1:
The patent introduces dynamic cyclic block permutations that adaptively map constellation words to cyclic blocks based on the specific code parameters and transmission conditions. This dynamic approach allows the system to optimize mapping efficiency for different scenarios without requiring a fixed, overly complex interleaver structure, achieving high parallelism with flexible but manageable complexity
Data Source
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AI summary
A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N'M folding sections (N' being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×N'/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.