QC-LDPC Shift-Coefficient Tables for Small 5G Code Blocks
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Solution Overview
Problem
Current technologies for implementing quasi-cyclic low-density parity-check (QC-LDPC) codes in 5G NR wireless communications lack defined methods for encoding and decoding, particularly for smaller code block sizes, which affects processing latency and decoder throughput efficiency.
Innovation Solution
The proposed method involves selecting a shift-coefficient table based on code block size and code rate for QC-LDPC code generation, using a base matrix and codebooks to optimize encoding, and employing hybrid orthogonal layer designs and kernel matrices to improve encoding efficiency and reduce processing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If QC-LDPC code is implemented with conventional methods, then coding can be performed, but processing latency increases and decoder throughput efficiency decreases for smaller code block sizes
Solution Approach 1:
The patent applies parameter changes by selecting different shift-coefficient tables based on code block size and code rate. Specifically, for smaller code block sizes (e.g., 512, 1024, 2048 bits), the patent selects shift-coefficient tables with parameters optimized for these sizes, rather than using a single universal table. This parameter adaptation enables the encoder and decoder to process smaller code blocks more efficiently, reducing processing latency and improving decoder throughput efficiency.
2Ease of manufacture
If a single shift-coefficient table is used for all code block sizes, then implementation is simpler, but encoding efficiency decreases for smaller code block sizes
Solution Approach 1:
The patent implements dynamics by making the shift-coefficient table selection adaptive rather than static. The system dynamically selects appropriate shift-coefficient tables based on the actual code block size and code rate being processed. This dynamic adaptation allows the encoding system to optimize its performance for each specific scenario, improving encoding efficiency for smaller code block sizes while maintaining reasonable implementation complexity through predefined selection rules.
3Reliability
If QC-LDPC code is implemented without optimized shift-coefficient table selection, then standard implementation can be used, but processing latency increases for smaller code block sizes
Solution Approach 1:
The patent applies preliminary action by pre-defining multiple shift-coefficient tables with parameters optimized for different code block sizes and code rates. These tables are prepared in advance and stored in the encoder and decoder. When processing begins, the system quickly selects the appropriate pre-prepared table based on the code block size and code rate, avoiding the need for real-time optimization calculations. This preliminary preparation significantly reduces processing latency for smaller code block sizes while maintaining reliable standard implementation.
Data Source
AI summary
A processor of an apparatus establishes a wireless communication link with at least one other apparatus via a transceiver of the apparatus. The processor wirelessly communicates with the other apparatus via the wireless communication link by: selecting a first shift-coefficient table from a plurality of shift-coefficient tables; generating a QC-LDPC code using a base matrix and at least a portion of the first shift-coefficient table; selecting a codebook from a plurality of codebooks embedded in the QC-LDPC code; storing the selected codebook in a memory associated with the processor; encoding data using the selected codebook to generate a plurality of modulation symbols of the data; and controlling the transceiver to multiplex, convert, filter, amplify and radiate the modulation symbols as electromagnetic waves through one or more antennas of the apparatus to transmit the modulation symbols of the data to the other apparatus via the wireless communication link.