QC-LDPC Shift Values With Multi-ACE Constraints for Short Cycles
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Solution Overview
Problem
Existing LDPC code designs face challenges in avoiding harmful short cycles with low connectivity, especially in rate-compatible LDPC codes, due to high ACE values in full parity-check matrices.
Innovation Solution
The proposed method involves a lifting process with different approximate cycle extrinsic message degree (ACE) constraints for various code rates and shift sizes, optimizing ACE constraints for each shift size separately to ensure higher connectivity for larger shift sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single ACE constraint is applied to the full parity-check matrix, then the overall code performance is improved, but harmful short cycles with low connectivity cannot be avoided in rate-compatible portions
Solution Approach 1:
The parity-check matrix is divided into multiple rate-compatible portions, each with its own ACE constraint. This segmentation allows different parts of the code to have different cycle connectivity requirements, preventing harmful short cycles in rate-compatible portions while maintaining overall performance.
Solution Approach 2:
Different ACE constraints are applied to different portions of the parity-check matrix based on their specific requirements. Rate-compatible portions receive constraints tailored to their cycle structure, while other portions maintain their original constraints, creating local optimization throughout the matrix.
2Reliability
If ACE constraints are applied to all cycles regardless of length, then cycle connectivity is improved, but the complexity of finding valid cyclic shifts increases
Solution Approach 1:
ACE constraints are applied selectively to cycles of specific lengths rather than all cycles. By focusing constraints on the most harmful cycle lengths, the patent achieves improved connectivity without the excessive complexity of constraining all possible cycles.
Solution Approach 2:
The patent applies different ACE constraint values depending on cycle length. Shorter cycles receive stricter constraints while longer cycles have relaxed constraints, optimizing the balance between connectivity improvement and computational complexity.
3Reliability
If one shift coefficient design is specified for each shift size, then optimal performance for each shift size is achieved, but storage requirements increase
Solution Approach 1:
A single set of base shift coefficients is designed to serve multiple shift sizes through the lifting process. This universal design allows the same base coefficients to be used across different code rates and shift sizes, eliminating the need for separate storage of designs for each shift size.
Data Source
AI summary
According to some embodiments, a method for use in a wireless transmitter of a wireless communication network comprises encoding information bits using a parity check matrix (PCM) and transmitting the encoded information bits to a wireless receiver. The parity check matrix (PCM) is optimized according to two or more approximate cycle extrinsic message degree (ACE) constraints. In some embodiments, a first portion of the PCM is optimized according to a first ACE constraint and a second portion of the PCM is optimized according to a second ACE constraint.


