QFN Leadframe Etching and Flank Electroplating for Solderability

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Solution Overview

Problem

Conventional semiconductor devices, such as Quad Flat No-leads (QFN) packages, face issues with solderability due to oxidized metal at contact flanks, which leads to nickel migration and discoloration, and have limited solder joint reliability due to insufficient tin plating thickness, especially in the automotive sector.

Innovation Solution

A method is introduced to form wettable flanks in QFN packages by leadframe etching with a mask, allowing for adequate tin electroplating of leads, eliminating the need for bottom-side pre-plating, and achieving a tin layer thickness of over 5 microns through electroplating, while removing sacrificial tie bars during singulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional electroless plating is used to plate contacts, then the plating process is simple, but the tin thickness is only 1.5-2.0 μm which is insufficient for automotive sector requirements

Engineering Contradiction:
Improvetin thicknessVSAvoidplating process complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent changes the plating method from electroless to electroplating, fundamentally altering the deposition parameters. This enables tin thickness to be increased from 1.5-2.0 μm to over 5 μm while maintaining process control through standard electroplating parameters such as current density, plating time, and electrolyte composition

Inventive Principle:
Principle #35Parameter changes

2Reliability

If contact width is increased to increase solder joint section, then solderability improves, but contact pitch decreases and migration risk increases

Engineering Contradiction:
Improvesolder joint reliabilityVSAvoidcontact pitch
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent transitions from two-dimensional contact geometry (increasing width) to three-dimensional contact geometry (adding vertical flanks). By electroplating the vertical flanks of the contacts with tin, the solderable surface area is dramatically increased without expanding the contact's horizontal footprint, thus maintaining contact pitch while improving solder joint reliability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If contact width is increased to increase solderable area, then solder joint section increases, but creepage distance issues arise

Engineering Contradiction:
Improvesolder joint reliabilityVSAvoidcreepage distance
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent resolves this contradiction by utilizing the vertical dimension through flank electroplating. The solderable area is expanded vertically along the contact flanks rather than horizontally, thereby increasing solder joint reliability without reducing the horizontal creepage distance between adjacent contacts

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If bottom-side pre-plating is used to improve solderability, then contact solderability improves, but leadframe cost increases and processing complexity increases

Engineering Contradiction:
Improvecontact solderabilityVSAvoidleadframe processing
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent inverts the conventional approach by applying plating to the vertical flanks of the contacts rather than the bottom surface. This flank electroplating method achieves superior solderability and wettability without requiring separate bottom-side pre-plating operations, thereby simplifying the overall leadframe processing sequence and reducing manufacturing complexity

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances solder joint reliability by increasing the solderable area, improving contact pitch and reducing migration risks, while maintaining a high number of I/O pins and meeting automotive sector standards for tin thickness.

Implementation Method 1

facilitate plating contact pads, including the flanks, with a tin layer having a thickness of more than 5 microns, via an electroplating process

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS12165880B2Method of manufacturing semiconductor devices and corresponding semiconductor device
Publication Date: 2024.12.10 STMICROELECTRONICS SRL
  • US12165880B2 patent drawing
  • US12165880B2 patent drawing
  • US12165880B2 patent drawing

AI summary

A semiconductor chip is mounted at a first surface of a leadframe and an insulating encapsulation is formed onto the leadframe. An etching mask is applied to a second surface of the leadframe to cover locations of two adjacent rows of electrical contacts as well as a connecting bar between the two adjacent rows which electrically couples the electrical contacts. The second surface is then etched through the etching mask to remove leadframe material at the second surface and define the electrical contacts and connecting bar. The electrical contacts include a distal surface as well as flanks left uncovered by the insulating encapsulation. The etching mask is then removed and the electrical contacts and the connecting bars are used as electrodes in an electroplating of the distal surface and the flanks of the electrical contacts. The connecting bar is then removed from between the two adjacent rows during device singulation.