QFN Lead-Frame Structure for Reliable Wire Bonding
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Solution Overview
Problem
Conventional QFN devices face challenges in ensuring reliable wire bonding due to manufacturing tolerances and increased costs associated with lead-frames requiring partial thickness regions.
Innovation Solution
The proposed solution involves a QFN packaged semiconductor device with a lead-frame of uniform thickness, where the encapsulant material forms a frame extending below the lead-frame lower surface, eliminating the need for partial thickness regions and enhancing wire bonding reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the lead-frame is partially thinned by etching or pressing to create recessed regions, then the wire bonds can be made shorter and electrical short risk is reduced, but the manufacturing cost increases and manufacturing precision decreases due to tolerance variability
Solution Approach 1:
The patent introduces an intermediary structure (the encapsulant frame extending below the lead-frame lower surface) that mediates between the wire bonding requirements and the lead-frame structure. This encapsulant frame acts as a spacer and support, allowing the lead-frame to maintain uniform thickness while still achieving the necessary separation and bonding reliability.
Solution Approach 2:
The patent extends the encapsulant material into the vertical dimension below the lead-frame lower surface, creating a three-dimensional structure that provides the necessary separation and support. This dimensional extension allows the lead-frame to remain uniform in thickness while achieving the functional separation needed for reliable wire bonding.
2Reliability
If the lead-frame is partially thinned by etching or pressing to create recessed regions, then the wire bonds can be made shorter and electrical short risk is reduced, but the manufacturing precision decreases due to tolerance variability
Solution Approach 1:
The encapsulant frame serves as an intermediary that compensates for lead-frame thickness variations. By providing a consistent encapsulant structure below the lead-frame, the system achieves reliable wire bonding without requiring precise control of lead-frame thickness through complex thinning processes.
Solution Approach 2:
The patent changes the parameter of lead-frame thickness from variable (in conventional thinned designs) to uniform (in the present invention). This parameter change is enabled by the encapsulant frame structure, which maintains the necessary geometric relationships regardless of lead-frame thickness variations.
3Reliability
If peripheral landing regions are positioned close to the die to reduce wire bond length, then wire bonding reliability improves, but the risk of electrical short between solder attachments increases
Solution Approach 1:
The encapsulant frame extending below the lead-frame acts as an intermediary barrier that prevents electrical shorting between peripheral landing regions and the die pad. This intermediary structure maintains the necessary electrical isolation while allowing the peripheral landing regions to be positioned close to the die for shorter wire bonds.
4Reliability
If a lead-frame with recessed regions is used to prevent electrical short, then electrical isolation is improved, but the device complexity increases
Solution Approach 1:
Instead of modifying the lead-frame to create recessed regions (the conventional approach), the patent inverts the approach by extending the encapsulant material to create the separating structure. This inversion simplifies the lead-frame design to uniform thickness while achieving the same electrical isolation function.
Data Source
AI summary
Disclosed is a QFN packaged semiconductor device, having a first major surface, an opposing second major surface and sidewalls therebetween, and comprising: a lead-frame, having a lead-frame lower surface and comprising a central die-pad region and a plurality of peripheral landing regions; a semiconductor die, attached to the die-pad on a top surface thereof; a plurality of bond-wires providing electrical connection between the semiconductor die and the plurality of peripheral landing regions; and encapsulant material, encapsulating the semiconductor die and bond-wires; wherein the encapsulant material forms a frame extending below the lead-frame lower surface, and defining the second major surface, the frame having an opening therein in a central region thereof under the semiconductor die, and wherein the sidewalls are spaced apart from the frame thereby exposing the lead-frame lower surface at the plurality of peripheral landing regions.