Multi-Row QFN Pad Pattern for Differential Pair Routing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing board-level ball pad patterns for multi-row Quad Flat No lead (QFN) packages face challenges in efficiently routing differential pairs due to space constraints and the need for equal line lengths, which can impact thermal-electrical performance and reliability.

Innovation Solution

A board-level pad pattern featuring a base substrate with staggered ball pads arranged in a ring shape around an exposed pad region, including first and second rows of ball pads with specific pitch arrangements and a third row of square-shaped ball pads, optimized for improved routing efficiency and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If differential pair routing is used to transmit signals, then noise and EMI are reduced, but space consumption increases

Engineering Contradiction:
Improvenoise and EMIVSAvoidspace consumption
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent transitions from traditional planar routing to three-dimensional vertical routing by utilizing vias to connect ball pads across multiple PCB layers. This dimensional change allows differential pairs to be routed vertically through the board thickness, significantly reducing the horizontal footprint while maintaining the noise-reduction benefits of differential signaling.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent replaces the mechanical constraint of planar trace routing with electrical connectivity through vias and multi-layer PCB architecture. Instead of being limited to surface-level trace paths, signals can traverse through the board's vertical dimension, substituting the mechanical routing challenge with an electrical solution that exploits the PCB's three-dimensional structure.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If differential pairs are routed with equal line lengths around obstacles, then signal integrity is improved, but routing complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidrouting complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By introducing the vertical dimension through multi-layer PCB routing, the patent provides additional path options for differential pairs. Instead of forcing equal-length routing around obstacles on a single layer, signals can diverge on one layer and converge on another, using vias to transition between layers. This dimensional freedom simplifies the achievement of equal-length routing while navigating around obstacles.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the routing path into multiple segments across different PCB layers, connected by vias. Each segment can be independently optimized for length and routing constraints, with the via transitions providing flexibility to adjust overall path lengths. This segmentation allows complex routing requirements to be broken down into manageable segments that are easier to balance for equal length.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If the number of I/O's is increased in IC devices, then functionality is enhanced, but package size increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidpackage size
Core Design Contradiction:
Adaptability or versatilityVSVolume of moving object

Solution Approach 1:

The patent utilizes the vertical dimension of multi-layer PCB routing to accommodate increased I/O connections without expanding the package footprint. By routing signals through multiple layers and using vias for inter-layer connections, the design can support higher I/O counts within the same planar area, effectively packing more functionality into a compact volume.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The exposed pad structure serves multiple functions simultaneously: it provides thermal dissipation, electrical grounding, and mechanical support. This multi-functionality allows the package to handle increased I/O loads and thermal management requirements without proportionally increasing package size, as the same structural element fulfills multiple roles.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12309921B2Board-level pad pattern for multi-row QFN packages
Publication Date: 2025.05.20 MEDIATEK INC
  • US12309921B2 patent drawing
  • US12309921B2 patent drawing
  • US12309921B2 patent drawing

AI summary

A board-level pad pattern includes a printed circuit board (PCB) substrate; an exposed pad region disposed within a surface mount region of the base substrate; and multiple staggered ball pads disposed within the surface mount region arranged in a ring shape around the exposed pad region. The staggered ball pads includes first ball pads arranged in a first row and second ball pads arranged in a second row. The first ball pads in the first row are arranged at two different pitches, and the second ball pads in the second row are arranged at a constant pitch. Multiple square-shaped ball pads are arranged in a third row between the exposed pad region and the staggered ball pads.