QFN Wettable Flank Sidewall Plating for AOI Solder Inspection
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Solution Overview
Problem
There is a need for an efficient method to manufacture quad flat no-leads (QFN) semiconductor packages with wettable flanks to facilitate automated optical inspection (AOI) for confirming proper solder connections.
Innovation Solution
A method involving a lead frame, integrated circuit dies, and a mold encapsulation is used to create step-cut wettable flanks. This is achieved by making parallel cuts through the lead frame and partially through the mold encapsulation, followed by electrolessly plating the sidewalls to form wettable flanks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional leadless packages are used, then the package has a low profile and small footprint, but the solder connections cannot be inspected by automated optical inspection
Solution Approach 1:
The lead frame is segmented by making perpendicular cuts that divide it into multiple sections, creating exposed sidewalls on the leads. These segmented leads with exposed sidewalls enable AOI inspection while maintaining the leadless package structure.
Solution Approach 2:
The patent applies different properties to different parts of the lead frame. Specifically, the sidewalls of the leads are made wettable by electroless plating, creating a local wettable region that enables AOI inspection without affecting the overall leadless package design.
2Ease of manufacture
If perpendicular cuts are made through the lead frame, then wettable flanks are created for AOI inspection, but the structural integrity of the lead frame may be compromised
Solution Approach 1:
The cuts are made partially through the mold encapsulation rather than completely through the entire package structure. This partial action creates the necessary wettable flanks while leaving sufficient material to maintain structural integrity.
3Reliability
If electroless plating is applied to sidewalls, then wettable flanks are formed for solder connection inspection, but additional manufacturing steps are required
Solution Approach 1:
The electroless plating process is self-catalyzing, meaning it uses the copper substrate itself to initiate and drive the plating reaction. This self-service mechanism reduces the need for additional complex processing steps compared to electrolytic plating methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables the production of QFN packages with step-cut wettable flanks, allowing for effective AOI of solder connections, which enhances manufacturing efficiency and reliability.
Implementation Method 1
electrolessly plating the sidewalls of the plurality of leads to form wettable flanks
Data Source
AI summary
Methods are disclosed herein for forming wettable flanks on quad flat no-leads semiconductor packages. The methods may begin with a package assembly having multiple non-singulated packages. The package assembly includes a lead frame assembly having dies coupled thereto. A mold encapsulation covers the dies and exposes portions of leads. An electroplating step deposits plating on the exposed portions of the leads. First and second series of parallel step cuts are made between the die packages to form sidewalls of wettable flanks. The first and second series of parallel step cuts are perpendicular to each other. These cuts are made at a depth to cut fully through the lead frame but not fully through the mold encapsulation. After the first and second series of parallel step cuts, the wettable flanks are plated using an electroless method. A third and fourth series of cuts singulates the assembly into discrete QNF semiconductor packages.