QFN Package Wettable Flank Plating for Solder Joint Reliability

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Solution Overview

Problem

Quad Flat Non-leaded (QFN) semiconductor packages face challenges with lead oxidation and solderability issues due to the removal of Palladium pre-plating during singulation, leading to poor solder joint connections.

Innovation Solution

The QFN package design includes electrically conductive mounting feet with exposed end surfaces that are coated with a conductive plating, typically tin, after partial separation and mounting on electroplating mounts, facilitating improved solder joint connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the QFN package undergoes singulation to separate individual devices, then the devices can be mounted independently, but the Palladium pre-plating on the lead sides is removed causing oxidation and poor solderability

Engineering Contradiction:
Improvedevice separation efficiencyVSAvoidsolder joint quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-plating the lead sides with Palladium before singulation to prevent oxidation, then performing singulation to separate devices, and finally re-plating the exposed end surfaces with tin after singulation but before soldering. This sequence ensures that the leads are protected during manufacturing while still allowing independent device mounting after separation.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the lead sides are left exposed after singulation, then the package structure is simplified, but the exposed surfaces oxidize and become difficult to solder

Engineering Contradiction:
Improvepackage structureVSAvoidsoldering process
Core Design Contradiction:
Device complexityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by selectively plating only the end surfaces of the mounting feet that will contact the PCB, while leaving the other surfaces as the original lead material. This localized approach provides solderability where needed without requiring complete re-plating of the entire lead structure, thus maintaining simplicity while improving soldering ease.

Inventive Principle:
Principle #3Local quality

3Reliability

If a additional plating layer is applied to the mounting feet, then solder joint quality is improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvesolder joint connectionVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs the additional tin plating as a preliminary action after singulation but before the final assembly and soldering steps. By timing the re-plating operation at this specific point in the manufacturing sequence, the process ensures solderability is established before components are attached, while allowing efficient batch processing that minimizes overall manufacturing complexity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the quality of solder joint connections by providing a reliable additional solder joint surface, addressing the oxidation and solderability issues of the exposed lead ends.

Implementation Method 1

an electrically conductive plating coats the exposed end surface

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS9324637B1Quad flat non-leaded semiconductor package with wettable flank
Publication Date: 2016.04.26 NXP USA INC
  • US9324637B1 patent drawing
  • US9324637B1 patent drawing
  • US9324637B1 patent drawing

AI summary

A Quad Flat Non-leaded (QFN) semiconductor package has a semiconductor die mounted on a die flag of a lead frame. A molded housing with a base and sides covers the die. The package has electrically conductive mounting feet each of which includes an exposed base surface in the base of the housing, an opposite parallel surface covered by the housing, and an exposed end surface in the one of the sides of the housing. The exposed end surface is normal to, and located between, the exposed base surface and the opposite parallel surface. Bond wires selectively electrically connect electrodes of the die to respective ones of the mounting feet. An electrically conductive plating coats the exposed base portion and exposed end surface of the mounting feet.