QLC Cloning Mode for Direct Writes Without Cache Saturation
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Solution Overview
Problem
Cloning procedures in memory systems, particularly those involving quad-level cells (QLCs), lead to cache saturation and trigger garbage collection operations, resulting in slower device performance and poor responsiveness due to the reliance on tri-level cells (TLCs) and single-level cells (SLCs) during data transfer.
Innovation Solution
Implementing a cloning mode that allows direct writing of data to QLC memory cells without first writing to TLCs or SLCs, reducing cache reliance and maintaining caches free for other operations by using dedicated memory addresses and write event indicators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is written to QLC memory cells through TLCs or SLCs during cloning procedures, then data transfer is enabled, but cache saturation occurs and garbage collection operations are triggered, resulting in slower device performance
Solution Approach 1:
The patent extracts the harmful intermediate step of writing data through TLCs or SLCs caches during cloning operations. By implementing a cloning mode that writes data directly to QLC memory cells, the patent removes the cache saturation problem and eliminates the need for garbage collection operations, thereby resolving the contradiction between cloning speed and device responsiveness
Solution Approach 2:
The patent introduces a cloning mode as an intermediary operation mode that bypasses the normal write path through caches. This cloning mode acts as a mediator between the host system and QLC memory cells, enabling direct data transfer without involving TLCs or SLCs caches, thus preventing cache saturation while maintaining high cloning throughput
2Ease of operation
If caches are used for data transfer during cloning procedures, then data writing is facilitated, but cache saturation triggers garbage collection operations, reducing device responsiveness
Solution Approach 1:
The patent extracts the problematic dependency on caches for cloning operations. By implementing direct writing to QLC memory cells through a dedicated cloning mode, the patent removes the need to use TLCs or SLCs caches, thereby eliminating cache saturation and preserving device responsiveness while maintaining full data transfer capability
3Ease of manufacture
If traditional write paths through TLCs or SLCs are used, then data can be written to QLCs, but cache resources are consumed, leaving caches unavailable for other operations
Solution Approach 1:
The patent extracts the unnecessary intermediate cache usage from the write path during cloning operations. By implementing a cloning mode that writes directly to QLC memory cells, the patent removes the consumption of cache resources while preserving the write operation capability, thereby making caches available for other concurrent operations and improving system adaptability
Data Source
AI summary
Methods, systems, and devices for supporting a cloning mode are described. A memory system may receive a first command associated with a cloning procedure for writing data to a set of memory cells of one or more memory devices, where the first command includes a first indication that indicates a set of addresses associated with the set of memory cells and a second indication that indicates a first write event or a second write event of at least two write events associated with the cloning procedure. The memory system may receive a first set of one or more first write commands to write the data to the set of memory cells, and the memory system may determine whether the first set of one or more first write commands correspond to the first write event or the second write event based on the second indication.