3D QLC NAND Memory Programming with Pre-Charge Electron Drainage
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Solution Overview
Problem
Existing methods for programming 3D QLC NAND memory devices tend to induce program disturb due to residual electrons generated during coarse programming, which are unable to be effectively drained.
Innovation Solution
The method involves performing coarse programming on selected word lines, pre-charging unselected bit lines, turning on and then turning off the channel between the unselected bit line and an adjacent word line to drain residual electrons, and subsequently performing fine programming on the selected word line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If coarse programming is performed on multiple word lines without draining residual electrons, then programming speed is improved, but program disturb is induced
Solution Approach 1:
The patent applies preliminary action by pre-charging unselected bit lines before fine programming operations. This preparatory step ensures that residual electrons from coarse programming are properly drained through the pre-charged bit lines, preventing program disturb while maintaining efficient programming speed. The pre-charge operation is performed in advance of the fine programming step, readying the bit lines to safely handle residual charge.
2Object-generated harmful factors
If residual electrons are drained by keeping channel open during fine programming, then program disturb is reduced, but programming speed decreases
Solution Approach 1:
The patent implements periodic action by using pulsed pre-charge signals on unselected bit lines during fine programming. Instead of continuously keeping the channel open, the pre-charge pulses are applied periodically or in specific time windows that coincide with when residual electron drainage is needed. This periodic approach maintains program disturb protection while minimizing the time the channel remains open, thus preserving programming speed.
3Object-generated harmful factors
If pre-charge voltage is applied to unselected bit lines for extended duration, then residual electrons are more effectively drained, but power consumption increases
Solution Approach 1:
The patent applies partial action by providing pre-charge voltage to only the unselected bit lines that require residual electron drainage, rather than charging all bit lines. Additionally, the pre-charge duration is optimized to be sufficient for effective electron drainage but not excessively long, thereby reducing unnecessary power consumption. This selective and optimized approach drains residual electrons effectively while minimizing energy waste.
Data Source
AI summary
A memory device includes memory cells, word lines respectively coupled to the memory cells, bit lines respectively coupled to the memory cells, and a peripheral circuit coupled to the word lines and the bit lines. The peripheral circuit is configured to apply a first program voltage to a first word line of the word lines, after applying the first program voltage to the first word line, apply a second program voltage to a second word line of the word lines, and after applying the second program voltage to the second word line, perform a program pre-charge operation. To perform the pre-charge operation, a first voltage is applied to the second word line, a second voltage is applied to the first word line, and after the program pre-charge operation, a third program voltage is applied to the first word line. The first voltage is greater than the second voltage.


