Logic Circuit Preserves QoS Information in Memory Transactions
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Solution Overview
Problem
In computer systems, quality-of-service (QoS) information is often lost or altered when processed by processor complexes that do not support QoS encoding, leading to incomplete memory transactions that fail to maintain original QoS information.
Innovation Solution
A logic circuit is introduced to receive and store QoS information from memory transactions, allowing it to bypass processor complexes that do not support QoS encoding by appending the original QoS information to memory transactions before they reach the memory, ensuring that QoS information is preserved and correctly transmitted.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory transactions are processed by processor complexes that do not support QoS encoding, then the transactions can be processed and forwarded to memory, but the QoS information is lost or altered during processing
Solution Approach 1:
A logic circuit is introduced as an intermediary component between the processor complex and memory. This logic circuit receives QoS information from the interface circuit before the transaction enters the processor complex, stores it temporarily, and then re-attaches it to the transaction after processing. This intermediary approach allows the processor complex to process transactions without QoS support while preserving the QoS information through the intermediary logic circuit.
Solution Approach 2:
The QoS information is extracted and stored in advance (before processing) by the logic circuit when the original memory transaction is received. By performing this preliminary extraction and storage action, the system ensures that the QoS information is captured before the processor complex potentially corrupts or loses it during processing.
2Loss of information
If QoS information is extracted and stored before processing, then QoS information is preserved, but additional logic circuitry is required to manage the bypass path
Solution Approach 1:
The QoS information is extracted separately from the main memory transaction flow and stored in a dedicated buffer within the logic circuit. This extraction approach isolates the QoS data from the processing path that would otherwise corrupt it, while the buffer provides a simple storage mechanism without requiring complex processing logic.
Solution Approach 2:
The memory transaction processing is segmented into distinct paths: the main transaction data flows through the processor complex for processing, while the QoS information is separated and handled by the logic circuit. This segmentation allows each component to handle only what it is designed for, reducing overall system complexity while preserving QoS information.
Data Source
AI summary
Systems and methods for processing quality-of-service (QoS) information of memory transactions are described. In an embodiment, a method comprises receiving identification information and quality-of-service information corresponding to a first or original memory transaction transmitted from a hardware subsystem to a memory, receiving a given memory transaction from a processor complex that does not support quality-of-service encoding, determining whether the given memory transaction matches the original memory transaction, and appending the stored quality-of-service information to the given memory transaction in response to the given memory transaction matching the original memory transaction. In some embodiments, a system may be implemented as a system-on-a-chip (SoC). Devices suitable for using these systems include, for example, desktop and laptop computers, tablets, network appliances, mobile phones, personal digital assistants, e-book readers, televisions, and game consoles.