QPSK LDPC Bit Interleaver Using Bit-Group Permutation

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Solution Overview

Problem

Bit-Interleaved Coded Modulation (BICM) systems face rapid performance degradation due to burst errors in digital broadcast channels, necessitating an optimized bit interleaver design for modulation order and error correction code parameters.

Innovation Solution

A bit interleaver optimized for an LDPC coder with a length of 16200 and code rate of 3/15, using a specific permutation order for bit group-based interleaving, is designed to effectively distribute burst errors, compatible with QPSK modulation for next-generation broadcasting systems like ATSC 3.0.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional bit interleaver is used in BICM systems, then the system structure remains simple, but burst errors in the channel cause rapid performance degradation

Engineering Contradiction:

Improvesystem performanceVSAvoidinterleaver design complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The bit interleaver divides the codeword into multiple bit groups and applies different interleaving patterns to different groups. This segmentation allows the system to handle burst errors more effectively by distributing them across different groups, thereby improving reliability without requiring a complete redesign of the entire interleaving structure.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The interleaver uses different interleaving parameters (such as interleaving depth, group size, and permutation patterns) that can be adjusted based on channel conditions and modulation schemes. By changing these parameters, the system optimizes performance for specific scenarios while maintaining a relatively simple base structure, resolving the contradiction between reliability and complexity.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If the bit interleaver is optimized for specific modulation order and code parameters, then performance improves, but the adaptability to different broadcasting standards decreases

Engineering Contradiction:

Improveerror correction performanceVSAvoidcompatibility with broadcasting standards

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The bit interleaver is designed with a universal structure that can accommodate different modulation orders (QPSK, 16-QAM, etc.) and LDPC code parameters (code rates, block lengths) by configuring specific parameters. The core interleaving mechanism remains the same across different standards, while adjustable parameters enable optimization for each specific broadcasting standard, thus achieving both high performance and broad adaptability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10326471B2Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same

Publication Date: 2019.06.18 ELECTRONICS & TELECOMM RES INST

AI summary

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.