QR Barcode Decoding Chip Pipeline Architecture

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Solution Overview

Problem

Conventional QR barcode decoding methods face significant computational burdens due to the need for separate processing of adaptive brightness equalization and binarization for each pixel, leading to slower decoding speeds.

Innovation Solution

A QR barcode decoding chip and method that utilize a pipeline hardware structure for parallel processing, where pixel coordinates of functional patterns are determined, and module parameters are calculated to construct a module map, allowing for efficient binarization and error correction, thereby reducing the impact of noise and distortions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If adaptive brightness equalization and binarization are carried out on each pixel respectively, then the decoding accuracy is improved, but the computational burden increases and decoding speed decreases

Engineering Contradiction:
Improvedecoding accuracyVSAvoiddecoding speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The decoding process is divided into distinct pipeline stages: image acquisition, brightness equalization, binarization, codeword extraction, and decoding. Each stage processes data independently and passes results to the next stage, enabling parallel processing and reducing computational burden while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential pixel-by-pixel processing to a pipeline architecture that processes multiple pixels simultaneously through different processing stages. This dimensional change from time-sequential to spatial-parallel processing dramatically improves decoding speed while preserving the accuracy benefits of per-pixel processing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If adaptive brightness equalization and binarization are carried out on each pixel respectively, then the image quality is improved, but the system complexity increases

Engineering Contradiction:
Improveimage qualityVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The complex image processing task is segmented into modular functional blocks (brightness equalization unit, binarization unit, codeword extraction unit, decoding unit). Each module performs a specific function with well-defined inputs and outputs, reducing overall system complexity while maintaining image quality through consistent per-pixel processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Brightness equalization is performed as a preliminary step before binarization, preparing the image data in advance. This preliminary action standardizes the input data for subsequent processing stages, simplifying the overall processing logic and reducing the complexity of individual processing steps.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If conventional sequential processing is used, then the processing logic is simple, but the decoding time increases

Engineering Contradiction:
Improveprocessing logicVSAvoiddecoding time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent implements a periodic pipeline processing architecture where data flows through multiple stages in a rhythmic sequence. Each processing stage operates periodically, accepting input from the previous stage and passing output to the next stage, enabling continuous high-speed decoding while maintaining relatively simple processing logic at each stage.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The pipeline architecture ensures continuous processing where multiple pixels are handled simultaneously at different stages. While one pixel is being decoded, another is being binarized, and a third is undergoing brightness equalization, eliminating idle time and reducing overall decoding time without significantly increasing processing logic complexity.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentEP2393035B1QR barcode decoding chip and decoding method thereof
Publication Date: 2016.03.23 NEWLAND DIGITAL TECH CO LTD
  • EP2393035B1 patent drawingFigure 1~2
  • EP2393035B1 patent drawingFigure 3
  • EP2393035B1 patent drawingFigure 4~5

AI summary

An exemplary QR barcode decoding chip includes a characteristic searching unit configured for searching for a characteristic pattern in the barcode image to determine pixel coordinates of the characteristic pattern; a barcode parameter acquiring unit configured for acquiring a barcode parameter according to the pixel coordinates of the characteristic pattern; a version/format parameter acquiring unit configured for acquiring a version/format parameter; a correction characteristic acquiring unit configured for searching for a characteristic position in the barcode image and acquiring a correction characteristic according to the characteristic position; a module information processing unit configured for calculating a grayscale value corresponding to a module according to the version/format parameter, the barcode parameter and the correction characteristic; a binarizing unit configured for binarizing the module; a codeword extracting unit configured for extracting a codeword according to the binarized module; and an error correction and decoding unit configured for decoding the codeword.