Quad Memory Cell Diode Steering for 3D Array Isolation

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Solution Overview

Problem

In three-dimensional memory devices, existing designs face challenges in individually addressing resistivity switching storage elements due to the layout of diodes and contacts, leading to unintentional activation of adjacent memory cells.

Innovation Solution

The implementation of diode steering elements that are shared among multiple resistivity switching storage elements, allowing for a larger diode area relative to the contact area, enabling stronger current application to specific storage elements while preventing current flow through adjacent elements, and the use of a bypass notch and off-parallel layout of X and Y lines to isolate diodes and address elements individually.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If diodes and contacts are arranged in conventional layouts, then memory cells can be formed, but individual addressing of storage elements is difficult and adjacent cells are unintentionally activated

Engineering Contradiction:
Improveaddressing precisionVSAvoidcell isolation
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The diode structure is segmented into multiple regions (first diode region, second diode region) that can be independently controlled. Each diode region is associated with specific storage elements, allowing selective activation of individual cells by controlling which diode region conducts current, thus preventing unwanted activation of adjacent cells

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the diode structure have different electrical properties and functions. The first diode region has different characteristics than the second diode region, allowing local control of current flow paths. This enables precise addressing by exploiting the different conduction properties of different diode regions

Inventive Principle:
Principle #3Local quality

2Power

If diode area is increased to allow stronger current application, then programming capability improves, but device area increases

Engineering Contradiction:
Improvecurrent strengthVSAvoiddevice area
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

Multiple diode regions share common contacts and overlapping control structures. The first and second diode regions share bit line contacts and word line contacts, allowing the structure to achieve the functionality of larger diodes while using shared infrastructure to reduce overall area consumption

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The diode structure and contacts serve multiple functions simultaneously. Single contacts serve multiple diode regions, and diode regions provide multiple conduction paths. This multi-functionality allows stronger current application through multiple parallel paths without proportionally increasing device area

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If conventional rail-stack layouts are used, then memory arrays can be formed, but sneak paths prevent accurate cell selection

Engineering Contradiction:
Improvememory array densityVSAvoidcell selection accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The multi-region diode structure acts as an intermediary control element between the bit line and word line. By controlling which diode region conducts, the system can selectively enable specific storage elements while blocking sneak paths through unselected cells, thus improving selection accuracy without reducing array density

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution allows for precise addressing of individual memory cells, reducing sneak paths and enhancing the ability to apply stronger currents, thereby improving the efficiency and accuracy of memory cell operations in three-dimensional memory arrays.

Implementation Method 1

at least three resistivity switching storage elements

Methodology Applied
Scientific EffectResistivity switching: Electrical Resistance

Implementation Method 2

a diode steering element electrically contacts the first electrode and the at least three resistivity switching storage elements

Methodology Applied
Scientific EffectDiode rectification: Diode

Data Source

PatentUS7910407B2Quad memory cell and method of making same
Publication Date: 2011.03.22 SANDISK TECHNOLOGIES LLC
  • US7910407B2 patent drawing
  • US7910407B2 patent drawing
  • US7910407B2 patent drawing

AI summary

A non-volatile memory device includes a first electrode, a diode steering element, at least three resistivity switching storage elements, and a second electrode. The diode steering element electrically contacts the first electrode and the at least three resistivity switching storage elements. The second electrode electrically contacts only one of the at least three resistivity switching storage elements.