Quadratic Approximation for FFT Phase Factors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Implementing high precision and high resolution Fast Fourier Transform (FFT) processors in Field Programmable Gate Arrays (FPGAs) is challenging due to significant phase factor memory consumption issues, particularly in large point-size applications, leading to excessive memory usage.
Innovation Solution
An interpolator configured to provide a quadratic approximation of sinusoids using a differentiator-integrator circuit with scaling and integration stages, reducing memory requirements by interpolating through longer sections while maintaining low interpolation noise, thus reducing the size of phase factor tables.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If LUT-based phase factor memories are used for high resolution FFT processors, then memory consumption increases significantly
Solution Approach 1:
The patent changes the approach from storing complete phase factor tables (LUT) to using a reduced set of pre-computed values combined with mathematical interpolation. By transforming the problem from direct table lookup to a combination of lookup and computation, the memory requirements are significantly reduced while maintaining the necessary precision for high resolution FFT processors.
Solution Approach 2:
The patent extracts only the essential information needed for phase factor generation by using sub-sampled LUT values and deriving the complete phase factor table through mathematical operations (differentiation and integration). This extraction approach removes the need to store all phase factor values directly in memory.
2Quantity of substance
If DDS blocks with sub-sampled LUT are used, then memory usage is reduced but interpolation noise increases
Solution Approach 1:
The patent employs feedback mechanisms through the integrator stages that continuously adjust the output based on the differentiated values. The integration process acts as a feedback loop that accumulates the differentiated values to reconstruct the original phase factor table, thereby reducing interpolation noise while maintaining reduced memory usage.
Solution Approach 2:
The patent performs preliminary differentiation of the sub-sampled LUT values to create a set of derived values that can be integrated to reconstruct the complete phase factor table. This preliminary action allows for more accurate interpolation by working with derivative information rather than direct value lookup.
3Measurement precision
If phase accumulator width is increased to accommodate higher precision, then precision improves but LUT size increases exponentially
Solution Approach 1:
The patent replaces the mechanical approach of directly storing all phase factor values in a large LUT with a mathematical system using differentiation and integration operations. This substitution allows high precision to be achieved through computational methods rather than through large memory structures, thereby reducing LUT size while maintaining precision.
Data Source
AI summary
Interpolators for quadratic approximation for sinusoids are described. A sample source providing first order derivatives of sub-sampled sets of phase factor samples is used. A differentiator is coupled to receive the first order derivatives and configured to provide second order derivatives of the first order derivatives. A first scaling device is coupled to receive each of the first order derivatives. A second differentiator is coupled to receive each of the first order derivatives and configured to respectively provide second order derivatives of the first order derivatives. A second scaling device is coupled to receive the second order derivatives. A first integrator is coupled to receive output from the first scaling device for preloading, and to receive output from the second scaling device for integration. A third scaling device is coupled to receive output from the first integrator. A second integrator is coupled to receive output from the third scaling device.