Quadratic Turbo Interleaving for Contention-Free Block Decoding
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Solution Overview
Problem
Existing turbo coding systems face challenges in implementing contention-free interleavers, which are essential for high-level parallel processing without memory access contentions, especially when dealing with various information block sizes, as defining a contention-free interleaver for every block size is inefficient and often impossible.
Innovation Solution
The method involves using a limited set of well-designed contention-free interleavers with sizes chosen from a set defined by K′ = ap × f, where a is an integer, and f is a continuous integer between fmin and fmax, and employing permutations such as π(i) = (f1 × i + f2 × i^2) mod K′ for interleaving, allowing for efficient coverage of multiple block sizes and flexible parallelism in decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a contention-free interleaver is designed for every information block size, then decoding performance is improved, but device complexity and implementation difficulty increase significantly
Solution Approach 1:
The patent defines a universal interleaver structure using quadratic polynomial permutation π(i) = (f1×i + f2×i²) mod K' that can be applied across multiple information block sizes. By establishing relationships between interleaver parameters for different block sizes (e.g., K' = a×K, f1' = a×f1, f2' = a²×f2), a single design methodology serves multiple coding scenarios, eliminating the need to design separate contention-free interleavers for each block size while maintaining decoding performance.
2Productivity
If filler bits are added to achieve contention-free interleaving, then parallel processing capability is improved, but loss of information increases
Solution Approach 1:
The patent systematically varies the interleaver parameters (K', f1, f2) based on the information block size K to minimize filler bits while maintaining contention-free properties. By establishing parameter relationships (K' = a×K, f1' = a×f1, f2' = a²×f2) and selecting appropriate multipliers a, the interleaver adapts to different block sizes, reducing the need for excessive filler bits and thereby minimizing information loss while enabling parallel processing.
3Reliability
If existing turbo coding systems are used, then error correction is provided, but memory access contentions occur during parallel processing
Solution Approach 1:
The patent segments the interleaving operation into a structured quadratic polynomial form π(i) = (f1×i + f2×i²) mod K' that can be computed independently for different segments of the input block. This segmentation allows parallel computation of interleaved indices without requiring synchronized memory access, thereby eliminating memory access contentions while maintaining the error correction capabilities of turbo coding.
Data Source
AI summary
A method and apparatus for turbo encoding with a contention-free interleaver is provided herein. During operation an input block of size K′ is received. The original input block and the interleaved input block are encoded to obtain a codeword block, wherein the original input block is interleaved using an interleaver of size K′ and a permutation π(i)=(f1×i+f2×i2)mod K′, where 0≦i≦K′−1 is the sequential index of the symbol positions after interleaving, π(i) is the symbol index before interleaving corresponding to position i, K′ is the interleaver size in symbols, and f1 and f2 are the factors defining the interleaver. The values of K′, f1, f2 are taken from at least one row of a table. The codeword block is transmitted through the channel.