Self-Calibrating Quadrature Clock Generator for Accurate Phase Spacing
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Solution Overview
Problem
Conventional quadrature clock generators suffer from signal attenuation leading to a degraded signal-to-noise ratio and fail to guarantee accurate spacing of the four phases in time.
Innovation Solution
A self-calibrating quadrature clock generator comprising a variable delay clock generator, a quadrature phase error detector, and an amplifier, which receives a first and third clock to generate a second and fourth clock, detects relative timing errors, and amplifies differences to control the timing, ensuring accurate phase spacing through a closed-loop feedback mechanism.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If filters are used to generate quadrature clock phases, then the quadrature clock can be generated from a two-phase clock, but the signal amplitude is reduced and signal-to-noise ratio is degraded
Solution Approach 1:
The patent extracts and removes the filtering operation from the quadrature clock generation process. Instead of using filters that attenuate the signal, the invention directly generates quadrature phases through buffer circuits and phase detection mechanisms, eliminating the source of signal loss and noise degradation while maintaining the ability to produce accurate quadrature clock outputs.
2Ease of operation
If filters are used to generate quadrature clock phases, then the quadrature clock can be generated from a two-phase clock, but the phase timing accuracy is not guaranteed
Solution Approach 1:
The patent implements a feedback mechanism where phase detection circuits continuously monitor the timing relationships between quadrature phases and provide correction signals. This closed-loop feedback ensures that phase timing accuracy is maintained and corrected, guaranteeing precise quadrature spacing without relying on filter characteristics that cannot ensure accurate timing.
3Productivity
If conventional polyphase filter is used, then quadruple clock phases can be generated, but signal amplitude is reduced due to filter loss
Solution Approach 1:
The patent replaces the mechanical/filter-based signal processing system with an electronic buffer and phase detection system. Instead of using physical filters that inherently lose signal energy, the invention uses active buffer circuits that can maintain or restore signal amplitude while generating the required quadrature phases, thereby eliminating the energy loss associated with filtering.
Data Source
AI summary
A quadrature clock generator includes a variable delay clock generator configured to receive a first clock and a third clock and output a second clock and a fourth clock in accordance with a control signal, wherein the first clock and the third clock are substantially the same but offset in timing by one half of the period; a quadrature phase error detector configured to receive the first clock, the second clock, the third clock, and the fourth clock and output a first phase detection signal and a second phase detection signal, wherein the first phase detection signal represents a relative timing between the first clock and the second clock and the second phase detection signal represents a relative timing between the second clock and the third clock; and an amplifier configured to amplify a difference between the first phase detection signal and the second phase detection signal into the control signal.