Quadrature Clock Generation Using Polyphase Filtering
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Solution Overview
Problem
Existing quadrature signal generation methods for memory systems, such as DDR memory systems, face challenges including increased size, power consumption, and phase noise due to the use of divide-by-two circuits and dual local oscillators, which can lead to high phase noise and difficulty in signal tuning and accuracy.
Innovation Solution
A quadrature signal generator that uses a filter bank, such as a polyphase filter, to generate quadrature clock signals at the same frequency as the input clock signal, reducing the need for the clock generator's operating frequency to be twice that of the desired frequency, and incorporating components like duty cycle adjusters, smoothing filters, limiting amplifiers, and phase adjusters to manage signal quality and bandwidth within a wideband frequency range (2.5 GHz to 5 GHz).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If divide-by-two circuits and dual local oscillators are used for quadrature signal generation, then quadrature clock signals can be generated, but the system size increases and power consumption increases
Solution Approach 1:
The patent combines the quadrature signal generation function with the existing clock generator circuitry. The in-phase and quadrature-phase clock signals are generated within the same clock generator using shared components such as the voltage-controlled oscillator and phase detector, eliminating the need for separate dual local oscillators and divide-by-two circuits. This merging approach reduces overall system size and power consumption while maintaining quadrature signal generation capability.
2Reliability
If divide-by-two circuits and dual local oscillators are used for quadrature signal generation, then quadrature clock signals can be generated, but the device area increases due to larger inductor area
Solution Approach 1:
The patent integrates quadrature signal generation within the existing clock generator, sharing the inductor and oscillator circuitry between the in-phase and quadrature-phase signal paths. By using a single voltage-controlled oscillator and phase detector to generate both signal types, the inductor area is significantly reduced compared to implementing separate dual local oscillators with dedicated inductors for each signal path.
3Reliability
If the clock generator operates at twice the desired frequency to generate quadrature signals, then quadrature clock signals can be generated, but phase noise increases
Solution Approach 1:
The patent generates quadrature-phase clock signals at the same frequency as the in-phase signals rather than using frequency division from a higher frequency source. By directly generating both signal types at the target frequency within the clock generator, the system avoids the phase noise accumulation that would result from dividing a higher frequency signal, thus maintaining lower phase noise levels.
4Reliability
If dual local oscillators are used for quadrature signal generation, then quadrature clock signals can be generated, but signal tuning and accuracy become difficult
Solution Approach 1:
The patent uses a single phase detector and control voltage generation circuit to simultaneously control both the in-phase and quadrature-phase voltage-controlled oscillators. This unified control architecture simplifies the tuning process, as adjustments to the control voltage automatically coordinate both oscillators, improving signal accuracy and making the system easier to operate compared to independent dual oscillator control.
Data Source
AI summary
Apparatuses and methods for quadrature signal generation are provided. An example includes a quadrature signal generator. The quadrature signal generator is configured to generate, based on a received differential signal, a plurality of quadrature clock signals at a same frequency as that of the received differential signal. The quadrature signal generator is also configured to provide the plurality of quadrature clock signals to a memory system.