Quadrature Clock Circuit With Regenerative Loads for Uniform Phase Spacing
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Solution Overview
Problem
Prior art quadrature clock generators face a dilemma where the design favors either input devices or output devices, leading to complexity due to the opposite types of devices used in data latches, making it challenging to optimize both simultaneously.
Innovation Solution
A quadrature clock generator circuit that includes a series of switches and inverting amplifiers to sample and convert phases of an interim clock into output phases, with regenerative loads and reset circuits to manage the clock phases, allowing for decoupling of input and output devices for separate optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data latches use input devices and output devices of opposite types, then the circuit can function as a quadrature clock generator, but the design becomes complex because optimizing for one device type makes the other unfavorable
Solution Approach 1:
The patent segments the data latch into separate input device and output device sections that can be independently optimized. By dividing the latch circuit into distinct functional blocks with separate device types, each section can be designed for its specific role without compromising the other, thus reducing overall design complexity while maintaining reliability.
Solution Approach 2:
The patent applies local quality by using different device types in different parts of the circuit - input devices optimized for input characteristics in the input section, and output devices optimized for output characteristics in the output section. This localized optimization allows each part to perform its function efficiently without the trade-offs that would arise from using uniform device types throughout.
2Manufacturing precision
If the circuit uses opposite type devices for input and output, then proper signal sampling and regeneration can be achieved, but separate optimization of input and output devices becomes difficult
Solution Approach 1:
The data latch is segmented into independent input and output sections that can be separately designed and optimized. This segmentation allows input devices to be optimized for sampling precision while output devices are optimized for signal regeneration, with each section manufacturable and tunable independently, thus achieving both high precision and ease of manufacture.
Solution Approach 2:
The patent employs parameter changes by allowing independent adjustment of device parameters in the input and output sections. Input device parameters can be optimized for sampling accuracy while output device parameters are adjusted for regeneration performance, enabling separate optimization without compromising manufacturing ease.
Data Source
AI summary
An apparatus is configured to receive a two-phase input clock and output a four-phase output clock. The apparatus includes a circuit configured in a ring topology comprising a first switch controlled by a first phase of the input clock, a first inverting amplifier, a second switch controlled by a second phase of the input clock, a second inverting amplifier, a third switch controlled by the first phase of the input clock, a third inverting amplifier, a fourth switch controlled by the second phase of the input clock, and a fourth inverting amplifier, wherein the first inverting amplifier and the third inverting amplifier share a first regenerative load that is reset upon the first phase of the input clock, and the second inverting amplifier and the fourth inverting amplifier share a second regenerative load that is reset upon the second phase of the input clock.