Quadrature Delay Loops With Dual Delay Paths for PVT Phase Accuracy
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Solution Overview
Problem
Generating high-speed quadrature clock signals with accurate phases is challenging due to susceptibility to process, voltage, and temperature (PVT) variations, which affects signal-to-noise ratio and eye diagram performance in digital and communication systems.
Innovation Solution
Employing two delay circuitries in a phase locked loop system to generate quadrature clock signals with a 90-degree phase difference, allowing for independent control of delays to compensate for PVT variations and improve tuning range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single delay circuitry is used to generate quadrature clock signals, then the device complexity is reduced, but the phase accuracy deteriorates due to susceptibility to PVT variations
Solution Approach 1:
The single delay circuitry is segmented into two separate delay circuitries, each responsible for generating one of the quadrature clock signals. This segmentation allows independent control and compensation of delays in each path, improving phase accuracy by eliminating the cumulative errors that would occur in a single shared delay circuit.
Solution Approach 2:
The invention introduces separate control signals for each delay circuitry, enabling independent adjustment of delay parameters. This allows the system to compensate for PVT variations by tuning each delay path separately, thereby maintaining accurate 90-degree phase difference between quadrature clock signals despite environmental changes.
2Measurement precision
If two delay circuitries are used to compensate for PVT variations, then the phase accuracy is improved, but the device complexity increases
Solution Approach 1:
The invention employs feedback mechanisms where the generated quadrature clock signals are monitored and used to adjust the delay control signals. This closed-loop control allows the system to automatically compensate for PVT variations, maintaining phase accuracy without requiring overly complex open-loop compensation circuits.
Solution Approach 2:
The two delay circuitries are designed with identical structures and functions, allowing them to be implemented using the same circuit topology. This universality simplifies the overall design by reusing proven delay cell designs and control logic, reducing the complexity increase that would otherwise result from having two separate delay generation paths.
3Productivity
If high-speed clock signals are generated, then the productivity is improved, but the phase accuracy deteriorates due to increased susceptibility to PVT variations
Solution Approach 1:
The invention implements dynamic control of delay parameters through separately adjustable control signals for each delay circuitry. This dynamic adjustment capability allows the system to adapt to PVT variations that increase at higher frequencies, maintaining phase accuracy even as operating speed increases and environmental sensitivities grow.
Data Source
AI summary
Disclosed herein are embodiments of an apparatus and a method for generating a quadrature clock signal. In one aspect, the apparatus includes a first delay circuitry to delay a clock signal according to a first control signal to generate a first delayed clock signal. In one aspect, the apparatus includes a second delay circuitry to delay the clock signal according to a second control signal to generate a second delayed clock signal. In one aspect, the apparatus includes a delay controller forming a first feedback loop with the first delay circuitry, and forming a second feedback loop with the second delay circuitry, where the delay controller determines a difference between the first delayed clock signal and the second delayed clock signal and modifies the first control signal and the second control signal according to the determined difference.