Quadrature Receive Interface Calibration Using PRBS and Phase Rotators

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Solution Overview

Problem

High-speed chip-to-chip communication systems face challenges in aligning quadrature clocks and compensating for variations in received data due to factors like supply voltages and temperature, which current quadrature receive serial interface circuits struggle to address effectively.

Innovation Solution

An enhanced quadrature receive serial interface circuit utilizing a pair of phase rotators to generate four quadrature clocks of identical frequency, along with a pseudo random bit sequence (PRBS) checker for calibration, allowing for the adjustment of clock signals to center the data eye without requiring an IQ generator or complex calibration patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an IQ generator is used to provide quadrature clocks, then quadrature clock generation is achieved, but power consumption increases significantly

Engineering Contradiction:
Improvequadrature clock generationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and removes the IQ generator component from the quadrature receive serial interface circuit. By eliminating this high-power component, the circuit achieves quadrature clock generation through alternative means (using the existing clock signal and phase shifters), thereby significantly reducing power consumption while maintaining the necessary quadrature clock functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

2Speed

If quadrature data sampling is used to reduce sampler speed requirements, then receive interface speed is improved, but difficulty to align to quadrature clocks increases

Engineering Contradiction:
Improvereceive interface speedVSAvoidclock alignment difficulty
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism using a PRBS checker that monitors the aligned data and provides feedback to the phase rotators. This feedback loop enables automatic adjustment and alignment of the quadrature clocks, eliminating the manual alignment difficulty while maintaining the high-speed receive interface capability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs self-alignment of quadrature clocks through the calibration process. The PRBS checker and phase rotators work together to automatically adjust clock phases without external intervention, making the system self-sufficient in maintaining proper quadrature alignment.

Inventive Principle:
Principle #25Self-service

3Reliability

If current quadrature receive serial interface circuits are used, then basic reception is achieved, but inability to compensate for variations in received data due to supply voltages and temperature occurs

Engineering Contradiction:
Improvebasic receptionVSAvoidcompensation for variations
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic calibration capabilities through controllable phase rotators that can adjust their output phases based on detected data quality. This dynamic adjustment allows the system to adapt to varying supply voltages and temperatures by real-time calibration, transforming a static circuit into a dynamically adaptive system that maintains performance under varying conditions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11973630B1Calibrating a quadrature receive serial interface
Publication Date: 2024.04.30 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11973630B1 patent drawing
  • US11973630B1 patent drawing
  • US11973630B1 patent drawing

AI summary

An enhanced quadrature receive serial interface circuit and methods are provided for calibrating the quadrature receive serial interface circuit. A quadrature receive serial interface circuit comprises a first phase rotator and a second phase rotator generating quadrature clocks of identical frequency. Calibration of the quadrature receive serial interface circuit uses a pseudo random bit sequence (PRBS) received by the quadrature receive serial interface circuit. For calibration, one-half of the received PRBS bits are sampled and the phase rotator generating in-phase 0° and 180° clock signals is adjusted to center the data eye for the sampled half of the PRBS bits. Then all data bits (even and odd data bits) of the received PRBS bits are sampled and the phase rotator generating quadrature phase 90° and 270° clock signals is adjusted to center the data eye of all data bits of the PRBS bits to complete calibration.