Quadrature Correction Loop for Wideband Clock Phase Alignment

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Solution Overview

Problem

High-speed serial communication systems face challenges in achieving accurate timing recovery due to quadrature error and duty cycle distortion, which are exacerbated by frequency-dependent correction ranges and power consumption constraints, leading to performance limitations and increased jitter.

Innovation Solution

Implementing a digitally-controlled quadrature correction loop and duty cycle correction loop, where duty cycle correction and quadrature error correction circuits are partitioned into actuation and sensing portions, allowing for independent and orthogonal feedback loops to correct clock signal errors, enabling precise clock phase alignment across various frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If frequency-dependent correction ranges are used to correct quadrature error and duty cycle distortion, then timing recovery accuracy is improved at specific frequencies, but performance degrades across wide frequency ranges and power consumption increases

Engineering Contradiction:
Improvetiming recovery accuracyVSAvoidfrequency range performance
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The correction loops are segmented into independent actuation and sensing portions, allowing separate optimization for different frequencies. The actuation portion applies corrections while the sensing portion monitors errors, enabling frequency-independent operation across wide bandwidths without the performance degradation associated with frequency-dependent correction ranges.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the operational parameters of the correction loops by using orthogonal feedback mechanisms that maintain constant correction effectiveness across varying frequencies. This allows the system to adapt to different frequency conditions while maintaining timing recovery accuracy without increasing power consumption.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If frequency-dependent correction ranges are used to correct quadrature error and duty cycle distortion, then timing recovery accuracy is improved at specific frequencies, but power consumption increases

Engineering Contradiction:
Improvetiming recovery accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

By segmenting the correction loops into independent actuation and sensing portions with orthogonal feedback, the system achieves timing recovery accuracy without requiring frequency-dependent adjustment mechanisms that would consume additional power. Each portion operates independently and efficiently across the full frequency range.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The orthogonal feedback loops are self-regulating and automatically maintain optimal correction performance across different frequencies without requiring external control or additional power consumption for frequency-dependent adjustments. The system serves itself by maintaining constant correction effectiveness through its inherent orthogonal structure.

Inventive Principle:
Principle #25Self-service

3Use of energy by moving object

If quadrature error and duty cycle distortion are not corrected, then power consumption is reduced, but timing recovery accuracy and data recovery performance degrade

Engineering Contradiction:
Improvepower consumptionVSAvoidtiming recovery accuracy
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent merges quadrature error correction and duty cycle distortion correction into unified orthogonal feedback loops. This integration achieves comprehensive timing recovery accuracy for both error types simultaneously without requiring separate correction mechanisms, thereby minimizing power consumption while maintaining high timing recovery accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11736230B1Digitally-controlled quadrature correction loop
Publication Date: 2023.08.22 CADENCE DESIGN SYST INC
  • US11736230B1 patent drawing
  • US11736230B1 patent drawing
  • US11736230B1 patent drawing

AI summary

A method and system for performing a duty cycle correction and quadrature error correction for a quarter-rate architecture TX/RX communication system, including correcting a duty cycle error between a first clock signal and a second clock signal, and correcting a quadrature error between a third clock signal and a fourth clock signal.