Passive Quadrature Phase Detection to Reduce Clock Mismatch

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Solution Overview

Problem

Conventional quadrature phase detectors using active devices like XOR gates result in high power consumption and phase detection mismatches due to semiconductor process variations.

Innovation Solution

Implementing a quadrature phase detector using passive components, including switches and filters, to selectively couple clock signals and generate detection results, with a control circuit to adjust phases based on detection results, thereby reducing power consumption and improving phase detection accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If active devices such as XOR gates are used to implement the quadrature phase detector, then the phase detection function is achieved, but the power consumption increases

Engineering Contradiction:
Improvephase detection accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent replaces active electronic devices (XOR gates) with passive circuit components (switches controlled by clock signals, resistors, and capacitors) to implement the phase detection function. This substitution eliminates the continuous power consumption inherent in active devices while maintaining the phase detection capability through voltage level comparisons at different phases.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent employs periodic switching actions synchronized with the clock signal phases to perform detection only when needed. The switches are controlled by the second clock signal to selectively connect different circuit nodes at specific phases, enabling phase detection through periodic sampling rather than continuous operation, thereby reducing average power consumption.

Inventive Principle:
Principle #19Periodic action

2Measurement precision

If four sets of circuits are designed to detect phase differences between clock signals with different phases, then comprehensive phase detection is achieved, but mismatches between circuits occur due to semiconductor process variations

Engineering Contradiction:
Improvephase detection accuracyVSAvoidphase detection consistency
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent merges the detection of multiple phase differences into a unified circuit architecture. Instead of using four separate independent circuits, the invention uses a single set of switches, nodes, and filtering components that process all four phase relationships (0-90°, 90-180°, 180-270°, 270-0°) through the same physical hardware, ensuring consistent process characteristics across all detections.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal detection circuit that handles multiple phase detection functions using the same components. The switches and filtering circuitry serve multiple purposes by being controlled at different phases, allowing a single circuit implementation to perform what would traditionally require four separate circuits, thereby eliminating mismatches due to process variations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4167487A1Low power quadrature phase detector
Publication Date: 2023.04.19 MEDIATEK INC
  • EP4167487A1 patent drawingFigure 1
  • EP4167487A1 patent drawingFigure 2
  • EP4167487A1 patent drawingFigure 3

AI summary

The present invention provides a quadrature phase detector including a detection circuit. The detection circuit includes a first switch, a second switch and a first filter, wherein the first switch is controlled by a second clock signal to selectively couple a first clock signal to a first node, the second switch is controlled by the second clock signal to selectively coupled the first node to a reference voltage, and the first filter is configured to filter voltages at the first node to generate a first detection result.