Quadrature RF Signal Generation Without Oscillator Pulling
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Solution Overview
Problem
Direct conversion in RF transmission subsystems experiences 'pulling' issues due to harmonic coincidence, degrading signal quality, particularly in cellular mobile phones, which can be mitigated but at the cost of increased consumption or complex architectures.
Innovation Solution
Generating phase quadrature signals using a non-integer rational frequency division method, where the frequency of the basic signal is the product of R (a non-integer rational number greater than 1, with p being a multiple of 4 and q an odd integer), to eliminate harmonics coinciding with the oscillator frequency, thereby avoiding 'pulling' and ensuring signal orthogonality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If integer frequency division of oscillator signal is used to generate transposition signals, then the architecture remains simple, but the Kth harmonic coincides with oscillator frequency causing 'pulling' phenomenon that degrades signal quality
Solution Approach 1:
The patent changes the frequency division parameter from an integer to a non-integer rational number R=p/q. This parameter change ensures that the transposition signal frequency Fc = FOSC × q/p does not create harmonic coincidence with the oscillator frequency, thereby eliminating the 'pulling' phenomenon while maintaining direct conversion architecture simplicity
Solution Approach 2:
The patent introduces asymmetric frequency relationships by using non-integer rational division ratios. Instead of symmetric integer division where harmonics align with the oscillator frequency, the asymmetric rational ratio p/q creates a frequency relationship where FOSC/q and FOSC/p do not generate harmful harmonics at the oscillator frequency, resolving the pulling issue
2Reliability
If factor K is increased to 4 (doubling PLL frequency) to avoid duty cycle errors causing phase errors, then signal orthogonality is maintained, but power consumption increases
Solution Approach 1:
The patent changes the frequency multiplication factor approach by using rational division R=p/q instead of simple integer multiplication K. This allows achieving the same orthogonality protection (with p being a multiple of 4) while operating at lower PLL frequencies, thereby reducing power consumption compared to doubling the PLL frequency to K=4
3Device complexity
If direct conversion architecture is used, then the architecture remains simple, but the 'pulling' phenomenon degrades signal quality; if heterodyne conversion is used instead, then 'pulling' is resolved, but architecture complexity increases significantly
Solution Approach 1:
The patent resolves the contradiction by changing the frequency synthesis parameter from integer to non-integer rational division. This allows direct conversion architecture to be maintained (simple structure) while eliminating the pulling phenomenon through the specific frequency relationship Fc = FOSC × q/p, where the transposed signal harmonics do not coincide with the local oscillator frequency
Data Source
AI summary
The method and device include the generation of two output signals (IRF, QRF) in phase quadrature, having a frequency spectrum including a dominant harmonic at a wanted frequency FC. The generation of a periodic basic signal (VP) having a frequency FOSC equal to the product of R and the desired frequency FC is included, R being a non-integer rational number greater than one and equal to a ratio p/q, in which p is an integer multiple of 4 and q an odd integer. Also included is a processing of the basic signal including, for example, at least a preprocessing having a frequency division by p with elimination of the even harmonics and a frequency multiplication by q.