Quadruple Patterning Fabrication for Fine IC Patterns
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Solution Overview
Problem
Current methods for fabricating integrated circuit devices face challenges in forming fine patterns with high integration density due to the resolution limits of photolithography processes, making it difficult to achieve small pitches and gaps between patterns.
Innovation Solution
A quadruple patterning technology (QPT) process is employed, involving one photolithography process and two double patterning processes, which uses sacrificial spacers and spacer layers to form patterns that can be etched as an etch mask, eliminating the need for intermediate sacrificial films and simplifying the process while reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography processes are used to form patterns, then manufacturing simplicity is maintained, but pattern resolution is limited and fine patterns with small pitches cannot be formed
Solution Approach 1:
The fabrication process is divided into multiple discrete stages: forming sacrificial spacers, depositing spacer layers, removing sacrificial spacers, and repeating the process. Each stage produces a specific pattern component, allowing complex fine patterns to be constructed from simpler intermediate patterns that are within photolithography resolution limits.
Solution Approach 2:
The invention transitions from two-dimensional planar patterning to three-dimensional vertical structures by forming sacrificial spacers and spacer layers with controlled thicknesses. This vertical dimension enables multiplication of pattern density without requiring proportionally smaller lateral dimensions, overcoming photolithography resolution limits.
2Manufacturing precision
If intermediate sacrificial films are used in double patterning processes, then pattern formation is achieved, but manufacturing costs increase and process steps are complicated
Solution Approach 1:
The invention extracts and eliminates the intermediate sacrificial film step from the double patterning process. By using sacrificial spacers that can be directly removed after forming the first pattern layer, the process simplifies to fewer discrete steps, reducing manufacturing complexity and cost while maintaining the ability to form fine patterns.
Solution Approach 2:
The sacrificial spacers serve multiple functions: they define the first pattern, serve as templates for spacer layer deposition, and are subsequently removed to create the second pattern. This multi-functional design eliminates the need for separate sacrificial films, making the process more efficient and cost-effective.
3Manufacturing precision
If high density patterns with small widths are formed, then integration density is improved, but photolithography resolution limits are exceeded
Solution Approach 1:
Spacer layers act as intermediary structures between the sacrificial spacers and the final pattern. By depositing spacer layers with controlled thicknesses on the sacrificial spacers, the invention creates intermediate patterns that bridge the gap between what photolithography can directly resolve and the desired final fine pattern dimensions.
Solution Approach 2:
The invention changes the critical parameter from lateral pattern dimensions (limited by photolithography resolution) to vertical spacer layer thicknesses (controllable by atomic layer deposition or chemical vapor deposition). This parameter transformation enables precise control of final pattern dimensions independent of photolithography resolution limits.
Data Source
AI summary
Methods of fabricating an integrated circuit device are provided. The methods may form feature patterns on a substrate using a quadruple patterning technology (QPT) process including one photolithography process and two double patterning processes. Sacrificial spacers obtained by first double patterning process and spacers obtained by second double patterning process may be formed on a feature layer at an equal level.