Quantizer Feedback Delay Compensation in CT Sigma-Delta Modulators

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Solution Overview

Problem

Continuous-time sigma-delta modulators face limitations in delay compensation due to high analog performance requirements and digital/analog scaling issues, particularly with higher digital clock frequencies and small number of bits, making existing analog and digital domain compensation methods impractical.

Innovation Solution

Applying compensatory feedback to a quantizer, which straddles the analog and digital domains, by controlling quantizer functionality with a digital output signal, shifting reference voltages, or using multiple quantizers with different reference voltages to align analog and digital levels, thereby reducing the need for high analog performance and improving scaling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If compensatory feedback is implemented in the analog domain, then delay compensation is achieved, but analog summer bandwidth requirements and performance requirements increase significantly

Engineering Contradiction:
Improvedelay compensationVSAvoidanalog summer bandwidth requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a digital summer as an intermediary component to perform the compensatory feedback summation in the digital domain rather than analog domain. The digital summer receives the high frequency digital signal and low frequency analog signal, converts them to compatible formats, and performs the summation digitally, thereby eliminating the bandwidth requirements for the analog summer while achieving the same delay compensation function.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If higher digital clock frequencies are used, then productivity increases, but analog summer bandwidth requirements increase

Engineering Contradiction:
Improvedigital clock frequencyVSAvoidanalog summer bandwidth
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical/analog summation system with a digital processing system. Instead of using an analog summer that must physically handle high bandwidth signals, the system uses digital logic circuits and algorithms to perform the same mathematical summation operation in the digital domain, allowing higher clock frequencies without increasing analog bandwidth requirements.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If digital domain delay compensation is used, then analog summer requirements are reduced, but digital/analog scaling issues arise

Engineering Contradiction:
Improveanalog summer requirementsVSAvoiddigital/analog level alignment
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent employs parameter transformation techniques to convert digital signal levels to analog-equivalent levels and vice versa. By using programmable gain amplifiers, reference voltage scaling, and digital-to-analog conversion with precise gain control, the system maintains accurate level alignment between digital and analog domains while performing delay compensation in the digital domain.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7834787B2Techniques for delay compensation of continuous-time sigma-delta modulators
Publication Date: 2010.11.16 NXP USA INC
  • US7834787B2 patent drawing
  • US7834787B2 patent drawing
  • US7834787B2 patent drawing

AI summary

A technique for implementing compensatory feedback in a continuous-time sigma-delta modulator includes providing, based on an analog input signal, a digital output signal at an output of a quantizer circuit of the continuous-time sigma-delta modulator. A functionality of the quantizer circuit is then controlled based on the digital output signal.