Protruding Region Terminals for Quantum Chip Testing

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Solution Overview

Problem

In quantum devices with a superconducting quantum circuit, testing individual components before assembly cannot ensure the characteristics of the qubit circuit, leading to unstable connection performance and challenges in securing terminal regions for external connections in three-dimensional wiring structures.

Innovation Solution

A quantum device configuration with a first chip and a second chip, where the first chip has a protruding region with terminals for testing, allowing for stable connection performance and secure external terminal regions, and the circuit under test is disposed on the second chip's periphery to avoid interference with operational qubits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple chips are assembled to configure a three-dimensional superconducting quantum circuit, then the quantum device functionality is improved, but testing stability and terminal region security deteriorate

Engineering Contradiction:
Improvequantum device functionalityVSAvoidtesting stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The first chip is segmented into a main body region and a protruding region. The protruding region extends beyond the second chip's outer periphery to provide dedicated terminal regions that are accessible for external connections and testing, while the main body region maintains stable bonding with the second chip. This spatial segmentation resolves the contradiction by separating testing access functions from bonding stability functions.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If chips are bonded together for three-dimensional structure, then device integration is improved, but terminal region accessibility deteriorates

Engineering Contradiction:
Improvedevice integrationVSAvoidterminal region accessibility
Core Design Contradiction:
Device complexityVSEase of operation

Solution Approach 1:

The first chip's protruding region extends in the planar dimension beyond the second chip's boundary, creating a three-dimensional stacked structure with accessible terminal regions. This dimensional arrangement allows terminals to be accessible from the side edges without compromising the vertical bonding integration between chips, resolving the contradiction between integration and accessibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If testing is performed on assembled quantum device, then connection performance verification is improved, but probe pin damage risk increases

Engineering Contradiction:
Improveconnection performance verificationVSAvoidprobe pin damage
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The protruding region serves as an intermediary structure that provides dedicated terminal regions for probe pin connections during testing. These terminals are positioned away from the bonded interface between chips, allowing testing to be performed without applying stress or damage to the fragile bump bonding connections, thus resolving the contradiction between testing capability and bonding protection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240160982A1Quantum device
Publication Date: 2024.05.16 NEC CORP
  • US20240160982A1 patent drawing
  • US20240160982A1 patent drawing
  • US20240160982A1 patent drawing

AI summary

A quantum device includes a first chip and a second chip that are assembled to configure a three-dimensional wiring structure. The first chip includes a protruding region protruded from a side edge of an outer periphery of the second chip and includes terminals on the protruding region.