3D Quantum Chip Layout for Higher Qubit Density
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Solution Overview
Problem
The challenge in expanding the quantity of qubits on a quantum chip is due to the limited area of the substrate, making it difficult to integrate qubits and corresponding signal transmission lines effectively.
Innovation Solution
The proposed quantum chip structure forms signal transmission lines and qubits on different circuit layers, with a metal piece connecting them through a through hole in an insulating substrate, allowing for electrical connection and improved integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If qubits and signal transmission lines are integrated on the same substrate surface, then the quantum chip can be constructed with conventional planar integration, but the quantity of qubits is limited by the substrate area
Solution Approach 1:
The patent transitions from planar 2D integration to 3D vertical integration by stacking multiple circuit layers. Signal transmission lines are formed on a base substrate while qubits are formed on an insulating substrate positioned above the base substrate, utilizing the vertical dimension to increase qubit density without expanding substrate area.
Solution Approach 2:
The quantum chip is divided into separate functional layers: a base substrate layer for signal transmission lines and an insulating substrate layer for qubits. This segmentation allows independent optimization of each layer and enables vertical stacking to increase integration density.
Data Source
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AI summary
The present application discloses a quantum chip and a fabrication method therefor, and the quantum chip includes a base substrate on which signal transmission lines are formed; and at least one insulating substrate located on the base substrate, where a qubit and a through hole penetrating through the insulating substrate are formed on the insulating substrate, a metal piece is formed in the through hole, and two ends of the metal piece are electrically connected to the signal transmission lines and the qubit, respectively, such that signal transmission between the signal transmission lines and the qubit is implemented and a qubit complete circuit located on different layers is formed, and a plurality of insulating substrates that are stacked are used for forming qubits located on insulating substrates in different layers, thereby expanding a quantity of the qubits to an enough amount. In this way, an integration degree of a quantum chip is improved.