Quantum Chip Fabrication via Sacrificial Material Removal
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Solution Overview
Problem
Existing fabrication methods for quantum computing chips face challenges due to materials introducing parasitic loss mechanisms, leading to qubit decoherence and device heating, and are incompatible with the design requirements of quantum computers.
Innovation Solution
The method involves forming a chip with a circuit element layer stack that includes a sacrificial material between circuit elements, a coherent device layer, and mechanical support structures, allowing for the removal of the sacrificial material and bonding of chips in a flip-chip configuration, while maintaining low-loss properties and coherence requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If sacrificial material is used to fill spaces between circuit elements during fabrication, then manufacturing precision is improved, but parasitic loss mechanisms are introduced causing qubit decoherence
Solution Approach 1:
The patent removes the sacrificial material (such as silicon dioxide or silicon nitride) from the final quantum device structure after it has served its fabrication purpose. This extraction eliminates the parasitic loss mechanisms and two-level systems that the sacrificial material would otherwise introduce to qubit coherence, while still allowing the material to provide structural support and alignment during the fabrication process.
Solution Approach 2:
The sacrificial material is deposited and patterned before the circuit elements are fully assembled, serving as a temporary structural framework that defines the spatial relationships between layers. This preliminary action enables precise alignment and positioning of subsequent layers without requiring the final structure to accommodate the sacrificial material, thus resolving the conflict between fabrication precision and qubit coherence.
2Adaptability or versatility
If multiple layers are stacked to increase device functionality, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent divides the quantum device into multiple discrete layers (substrate layer, circuit element layer, coherent device layer, etc.), each with specific functions. This segmentation allows independent optimization of each layer while maintaining overall system functionality, reducing the complexity of designing and fabricating a monolithic multi-functional device.
Solution Approach 2:
The patent transitions from planar device architecture to three-dimensional stacked architecture, adding the vertical dimension to device design. This enables increased functionality and component density without proportionally increasing lateral device footprint, managing complexity through spatial reorganization rather than functional integration in a single plane.
3Ease of manufacture
If bond interface is integrated with coherence-critical layers, then device integration is simplified, but qubit decoherence increases
Solution Approach 1:
The patent extracts the bond interface from the coherence-critical regions by placing bonding pads and interconnect structures in areas that do not overlap with qubit locations. This separation ensures that bonding processes, materials, and potential defects at the bond interface do not directly impact qubit coherence, while still achieving complete device integration through the bond interface.
Solution Approach 2:
The patent introduces an intermediate layer or region between the bond interface and the coherence-critical layers, which acts as a mediator to isolate the two. This intermediate structure allows mechanical and electrical bonding to occur without allowing parasitic losses, two-level systems, or defects from the bond interface to couple to the qubit modes, thus maintaining qubit coherence while achieving device integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of quantum computing chips with reduced decoherence and heating, compatible with next-generation quantum device demands, by separating the bond interface from the coherence-critical layers and using dielectric materials with low microwave loss tangents.
Implementation Method 1
removing the sacrificial material
Implementation Method 2
mechanical support structures extending vertically through two or more layers
Implementation Method 3
bonding the first chip to a second chip in a flip-chip configuration
Data Source
AI summary
A method includes providing a first chip having a circuit element layer stack, the circuit element layer stack including a plurality of circuit elements distributed across a plurality of layers. The circuit element layer stack has a sacrificial material filling a space between the plurality of circuit elements in the plurality of layers and a coherent device layer disposed on the circuit element layer stack. The method includes removing the sacrificial material.