Quantum Circuit Compilation Minimizing CNOT Cost
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Solution Overview
Problem
Existing methods for transforming quantum circuits to comply with execution constraints on quantum computers often require a high number of CNOT-gates, which increases execution time and vulnerability to errors.
Innovation Solution
A compiling method that iteratively converts an input quantum circuit into an output circuit by transferring single-qubit gates, identifying and correcting non-compliant gates using patterns of single-qubit and CNOT-gates, and minimizing the number of CNOT-gates involved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If SWAP-gates are inserted to make CNOT-gates executable on quantum computers with limited connectivity, then the quantum circuit becomes executable, but the number of CNOT-operations increases significantly
Solution Approach 1:
The patent applies preliminary action by performing circuit transformation before execution to minimize CNOT-cost. The method transforms the quantum circuit in advance to comply with connectivity constraints while optimizing the number of CNOT-gates, rather than adding SWAP-gates during or after circuit design. This preliminary optimization reduces the total CNOT-count before the circuit is executed on the quantum computer.
2Ease of operation
If SWAP-gates are inserted to enable direct coupling, then the quantum circuit becomes executable, but the execution time increases due to additional CNOT-operations
Solution Approach 1:
The patent performs circuit transformation in advance to minimize the number of CNOT-gates required for execution. By optimizing the circuit structure before execution, the method reduces the total operation count and thereby decreases the execution time on the quantum computer, while still ensuring compliance with connectivity constraints.
3Ease of operation
If SWAP-gates are inserted to satisfy connectivity constraints, then the quantum circuit becomes executable, but the vulnerability to errors increases
Solution Approach 1:
The patent transforms the quantum circuit in advance to minimize the number of CNOT-gates, which are error-prone operations on current quantum hardware. By reducing the total CNOT-count through preliminary optimization, the method decreases the cumulative error probability and improves the reliability of the quantum computation while maintaining executability.
Data Source
AI summary
The disclosure refers to method for converting an input quantum circuit comprising gates into an output quantum circuit compliant with execution constraints, comprising: determining if a front layer comprises single-qubit gates, and updating the front layer; reiterating the determining step as long as the front layer comprises single-qubit gates; identifying in the front layer a quantum gate that does not satisfy execution constraints; determining a pattern such that the gate satisfies the execution constraints when applying the adjoint pattern to the gate; adding the pattern to the output quantum circuit, and applying the a joint pattern to the gate; and reiterating these steps until each quantum gate in the input quantum circuit satisfies the execution constraints; wherein each pattern is determined in such a way that a number of CNOT-gates comprised by at least one pattern is minimized.