Quantum Circuit Compression via SWAP Gate Elimination
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Solution Overview
Problem
Current quantum computers, particularly Noisy Intermediate-Scale Quantum (NISQ) devices, are limited by the depth of quantum circuits and limited connectivity, making it challenging to implement useful algorithms due to the need for expensive SWAP gates, which are often NP-Hard to minimize.
Innovation Solution
A method for compressing quantum circuits by identifying sections that match a predetermined arrangement of gates with non-local interactions and replacing them with functionally equivalent arrangements that eliminate SWAP gates, using criteria defined by equations such as the pentagon equation to reduce circuit depth and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If SWAP gates are used to implement non-local interactions on quantum circuits with limited connectivity, then the quantum algorithm can be implemented, but the circuit depth and number of gates increase significantly
Solution Approach 1:
The patent extracts and eliminates SWAP gates from the quantum circuit by applying circuit compression techniques. Specifically, it identifies and removes redundant SWAP operations that can be optimized away, thereby reducing circuit depth while maintaining the ability to implement non-local interactions through direct gates when connectivity permits
Solution Approach 2:
The patent merges multiple circuit transformations into a unified compression process. By combining gate optimization, SWAP elimination, and circuit reordering into a single integrated approach, it achieves greater circuit compression efficiency than sequential methods, reducing overall circuit depth while preserving algorithm functionality
2Adaptability or versatility
If SWAP gates are used to move qubit states to enable two-qubit gates on non-adjacent qubits, then the algorithm can execute, but the number of gates increases and computational complexity rises
Solution Approach 1:
The patent extracts and removes SWAP gates from the circuit by identifying opportunities to eliminate them through compression. It specifically targets SWAP operations that can be removed without affecting the computational functionality, thereby reducing the total gate count while preserving qubit state mobility where needed
Solution Approach 2:
The patent changes the representation and ordering of gates in the circuit. By reordering operations and changing the parameterization of quantum gates, it creates opportunities to eliminate SWAP gates entirely or reduce their number, achieving more efficient circuit implementations with fewer total gates
3Ease of manufacture
If multi-pass heuristic techniques are used for circuit transpilation, then the process is computationally feasible, but the minimum number of SWAP gates cannot be guaranteed
Solution Approach 1:
The patent incorporates feedback mechanisms in the circuit compression process. By iteratively applying compression rules and evaluating the resulting circuits, it refines the transpilation process to achieve more optimal SWAP gate elimination while maintaining computational feasibility through systematic rather than purely heuristic approaches
Data Source
AI summary
A method of compressing a quantum circuit using a quantum circuit compressor is disclosed. The method comprises receiving data defining a quantum circuit and identifying a section of the quantum circuit that matches a predetermined circuit template. The circuit template specifies a first arrangement of quantum gates including at least one SWAP gate for implementing a non-local interaction and is associated with a predetermined second arrangement of quantum gates that does not include the SWAP gate. The compressor determines whether the circuit section meets a compression criterion. In response to determining that the circuit section meets the compression criterion; the compressor modifies the circuit definition to replace the first arrangement of quantum gates with the second arrangement of quantum gates, and outputs the modified circuit definition, for example to a quantum computing system for execution of the modified circuit.