Quantum Circuit Simulation Graph Simplification
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Solution Overview
Problem
Current methods struggle to effectively simulate large-scale quantum circuits due to memory requirements exceeding those of even the most advanced supercomputers, especially when dealing with 50 qubits or more, leading to inefficiencies in both time and space complexity.
Innovation Solution
A system and method that utilize an undirected graph to model quantum circuits, identifying and removing vertices coupled to two-qubit quantum gates, thereby simplifying the graph and reducing the time- and space-complexity of the simulation, using tensor network contraction and greedy algorithms for efficient parallel processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If classical simulation methods are used for large-scale quantum circuits with 50 qubits or more, then the simulation can capture the full quantum behavior, but the memory requirement exceeds 16 PB which is beyond even the most advanced supercomputers
Solution Approach 1:
The patent segments the quantum circuit simulation into multiple layers corresponding to different time steps. Each layer processes a subset of quantum gates rather than attempting to simulate the entire circuit state simultaneously. This segmentation allows the simulation to proceed in manageable increments, reducing the peak memory requirement from storing the complete 2^50 state vector to storing only the necessary intermediate results for each layer.
Solution Approach 2:
The patent extracts and removes vertices from the computational graph that correspond to quantum gates whose effects can be determined or are not critical to the final measurement outcomes. By identifying and removing such vertices (particularly those coupled to two-qubit quantum gates), the simulation reduces the number of state transitions that must be computed and stored, thereby reducing memory requirements while preserving the essential quantum behavior.
2Reliability
If the complete state space is stored for 50 qubits, then all quantum states are available for computation, but the communication overhead becomes extremely large when only a portion of states is stored
Solution Approach 1:
The patent segments the computation into layers where each layer processes specific quantum gates and produces intermediate results. This segmentation allows the simulation to communicate only the necessary intermediate state information between layers rather than transferring the complete state space, thereby reducing communication overhead while maintaining computation completeness.
Solution Approach 2:
The patent performs preliminary identification and removal of vertices that can be eliminated from the computational graph before execution. This preliminary action reduces the size of the computational graph in advance, so that during actual simulation, fewer state transitions need to be computed and communicated between processing units, reducing communication overhead while preserving the ability to compute complete measurement statistics.
3Productivity
If vertices coupled to two-qubit quantum gates are removed from the graph, then the graph simplification reduces computational complexity, but the identification and removal process requires traversing the entire graph
Solution Approach 1:
The patent applies local quality by focusing the graph traversal and vertex removal process on specific regions of the computational graph where two-qubit gates are concentrated. Rather than uniformly processing the entire graph, the method identifies and processes local subgraphs containing two-qubit gates, removes vertices in those regions, and leaves other regions unchanged. This localized approach reduces the overall processing time compared to traversing and potentially modifying the entire graph.
Data Source
AI summary
One embodiment described herein provides a system and method for simulating behavior of a quantum circuit that includes a plurality of quantum gates. During operation, the system receives information that represents the quantum circuit and constructs an undirected graph corresponding to the quantum circuit. A respective vertex within the undirected graph corresponds to a distinct variable in a Feynman path integral used for computing amplitude of the quantum circuit, and a respective edge corresponds to one or more quantum gates. The system identifies a vertex within the undirected graph that is coupled to at least two two-qubit quantum gates; simplifies the undirected graph by removing the identified vertex, thereby effectively removing the two-qubit quantum gates coupled to the identified vertex; and evaluates the simplified undirected graph, thereby facilitating simulation of the behavior of the quantum circuit.