Quantum Circuit Packing for Concurrent Qubit Execution

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Solution Overview

Problem

Current quantum computer systems face inefficiencies in utilizing qubit memories due to suboptimal packing of quantum circuits, leading to reduced throughput and increased costs, as multiple circuits cannot be run concurrently without conflicting over qubit resources.

Innovation Solution

A quantum circuit packer optimizes the mapping of required resources to available qubits by identifying candidate packings and selecting the most efficient set using a resource mapper and packing evaluator, allowing for concurrent execution of non-overlapping circuits and enabling automated calibration during operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If quantum circuits are packed into qubit memory without optimization, then the system can accommodate more circuits, but qubit resource conflicts occur and throughput decreases

Engineering Contradiction:
ImprovethroughputVSAvoidqubit resource allocation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing circuit packing optimization before quantum circuit execution. The system pre-processes circuit resource requirements and allocates qubits in advance, creating an optimized mapping that prevents resource conflicts during actual execution and maximizes throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where the system monitors qubit usage patterns and circuit execution results. This feedback information is used to refine future packing decisions, improving resource allocation efficiency and reducing conflicts in subsequent circuit executions.

Inventive Principle:
Principle #23Feedback

2Productivity

If multiple quantum circuits are executed concurrently to increase throughput, then processing efficiency improves, but qubit resource conflicts arise

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidcircuit execution reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the qubit memory into distinct resource blocks and assigns specific qubit ranges to different circuits. This segmentation allows multiple circuits to execute concurrently without overlapping resource allocations, maintaining both high throughput and execution reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic resource allocation where the system can reallocate qubits between circuits based on execution progress and resource availability. This dynamic adjustment enables flexible concurrent execution while preventing resource conflicts that would compromise reliability.

Inventive Principle:
Principle #15Dynamics

3Loss of energy

If qubit memory is used inefficiently, then hardware resources are wasted, but implementing optimization increases system complexity

Engineering Contradiction:
Improvehardware resource wasteVSAvoidpacking optimization complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements self-service optimization where the system automatically performs circuit packing and resource allocation without external intervention. The automated packing algorithm efficiently utilizes qubit memory, preventing hardware waste while keeping the operational interface simple for users.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11900211B2Quantum-circuit packing
Publication Date: 2024.02.13 COLDQUANTA INC
  • US11900211B2 patent drawing
  • US11900211B2 patent drawing
  • US11900211B2 patent drawing

AI summary

A quantum computer system packs quantum circuits into quantum memory so the circuits can be run concurrently. A quantum-circuit packer includes a resource mapper and a packing evaluator. The resource mapper characterizes the task of identifying candidate packings of pending quantum circuits as an integer linear problem (ILP), for which solutions are known. The packing evaluator applies an optimization criterion to select an optimum packing from the candidate packings. The optimum packing is run; the results are assigned to respective circuits that make up the packing.