Quantum Circuit Patch Fidelity Estimation for Scalable Benchmarking
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Solution Overview
Problem
Conventional benchmarking techniques for quantum computing require exponential computational cost for simulating large-scale quantum circuits, leading to inaccurate fidelity estimates and inability to explore new complexity regimes effectively.
Innovation Solution
The technique involves spatially splitting quantum circuits into isolated patches and using Schrödinger-Feynman algorithms to simulate these patches, allowing for efficient fidelity estimation with linear or constant computational complexity, even for large-scale systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional benchmarking techniques are used to simulate large-scale quantum circuits, then fidelity estimation can be performed, but computational cost becomes exponential and becomes intractable
Solution Approach 1:
The patent divides the quantum circuit into multiple spatial patches by removing boundary gates, allowing each patch to be simulated independently with classical computers. This segmentation reduces the exponential computational complexity by breaking down the large circuit into smaller, manageable pieces that can be processed in parallel.
Solution Approach 2:
The patent introduces a classical computer as an intermediary to simulate the quantum circuit patches. By using classical simulation of the spatial patches as a mediator, the system can estimate quantum fidelity without requiring full quantum simulation, thus reducing computational cost while maintaining measurement precision.
2Measurement precision
If full quantum circuits are simulated classically, then complete fidelity information is obtained, but simulation becomes impossible for large numbers of qubits
Solution Approach 1:
The patent segments the quantum circuit into spatial patches by removing boundary gates, enabling independent simulation of each patch. This allows scalability to large numbers of qubits because each patch can be simulated separately using classical computers, avoiding the exponential complexity of simulating the full circuit.
Solution Approach 2:
The patent performs partial simulation by only simulating the spatial patches after removing boundary gates, rather than simulating the complete circuit. This partial action provides sufficient fidelity information for benchmarking while being computationally tractable for large-scale systems.
3Device complexity
If boundary gates are removed to create isolated patches, then classical simulation becomes feasible, but the circuit fidelity estimation becomes approximate
Solution Approach 1:
The patent uses feedback from multiple circuit executions to improve fidelity estimation. By performing the benchmarking process multiple times and aggregating results, the system refines the fidelity estimate to approach the true value, compensating for the approximations introduced by removing boundary gates.
Solution Approach 2:
The patent changes the circuit configuration by removing boundary gates to create isolated patches, which fundamentally alters the simulation requirements. This parameter change makes classical simulation feasible while maintaining sufficient accuracy for practical fidelity estimation through statistical aggregation.
4Device complexity
If statistical methods are used to estimate fidelity, then computational cost is reduced, but accuracy deteriorates for large-scale systems
Solution Approach 1:
The patent segments the circuit into spatial patches that can be simulated exactly using classical computers. This segmentation allows for accurate fidelity estimation without relying on statistical approximations, as the patch simulations provide exact probability distributions that can be directly used to compute fidelity.
Data Source
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AI summary
Methods, systems and apparatus for estimating quantum processor performance. In one aspect, a method includes defining a benchmarking circuit configured to operate on an array of qubits, wherein the benchmarking circuit comprises one or more cycles of quantum gates, each cycle comprising a respective layer of randomly sampled single-qubit gates and a layer of multiple instances of a same multi-qubit gate; partitioning the defined benchmarking circuit into two or more sub-circuits, comprising: defining one or more boundaries between qubits in the array of qubits, removing instances of the multi-qubit gate that cross the defined one or more boundaries to create the two or more sub-circuits; performing a benchmarking process using the partitioned benchmarking circuit to estimate a respective circuit fidelity of each of the sub-circuits; and multiplying the estimated circuit fidelities of each of the sub-circuits to obtain an estimate of the fidelity of the quantum processor.