Quantum Dot Image Sensor Fill Factor via Vertical Integration
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Solution Overview
Problem
Current image sensors face challenges in achieving high resolution and sensitivity while maintaining small pixel sizes, as existing technologies compromise on fill factor and cost due to the need for complex interconnects and custom process geometries.
Innovation Solution
The use of quantum dot pixels with a top-surface optically sensitive layer and integrated circuitry allows for small pixel sizes without sacrificing fill factor, using standard CMOS processes and larger geometries to reduce costs and enhance performance, enabling high-speed and high-quality image processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If quantum dot pixels with top-surface optically sensitive layer are used, then fill factor is improved, but device complexity increases due to integrated circuitry requirements
Solution Approach 1:
The patent merges the optical sensing function with the circuit integration by placing quantum dot pixels directly on the CMOS substrate, combining photodetection and signal processing in a single integrated structure. This eliminates the need for separate optical components and complex interconnect structures, thereby improving fill factor while managing device complexity through functional integration.
Solution Approach 2:
The patent transitions from planar pixel arrangements to vertically stacked three-dimensional pixel structures with quantum dots positioned above the CMOS circuit layer. This vertical stacking allows multiple functional layers to occupy the same footprint, improving fill factor while the modular vertical architecture helps manage overall device complexity through systematic layer organization.
2Ease of manufacture
If standard CMOS processes are used, then manufacturing cost is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent modifies the standard CMOS fabrication parameters and process geometries to accommodate quantum dot pixel formation. By adjusting deposition conditions, layer thicknesses, and patterning parameters, the patent achieves precise quantum dot positioning and sizing while maintaining compatibility with standard CMOS manufacturing processes, thus balancing manufacturing cost with required precision.
Solution Approach 2:
The patent introduces intermediate layers and buffer structures between the CMOS circuit layer and the quantum dot pixel layer. These intermediary layers serve as mediators that facilitate precise pattern transfer and alignment, enabling high manufacturing precision while using standard CMOS process steps. The intermediary layers absorb dimensional variations and simplify the overall fabrication process.
3Measurement precision
If pixel size is reduced, then resolution is improved, but sensitivity decreases
Solution Approach 1:
The patent employs composite material structures combining quantum dots with semiconductor substrates and encapsulation layers. The quantum dots provide high quantum efficiency and wavelength-selective absorption, while the semiconductor substrate provides mechanical support and electrical connectivity. This composite structure enables small pixel sizes to maintain both high resolution and sensitivity by optimizing the optical and electrical properties of each material component.
Solution Approach 2:
The patent applies different material compositions and structural characteristics to different regions of the pixel structure. The quantum dot layer provides localized optical sensing with high sensitivity, while the underlying CMOS circuitry provides localized signal processing. This spatial differentiation of functional qualities allows each region to be optimized independently, maintaining both resolution and sensitivity despite reduced pixel size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high-resolution, high-sensitivity image sensors with improved dynamic range and lower power consumption, while maintaining a high fill factor and reducing costs through the use of standard CMOS processes and larger geometries.
Implementation Method 1
a top-surface optically sensitive layer... to detect an image... signal from the photosensitive material... varies based on the intensity of light incident on the photosensitive material
Implementation Method 2
optically sensitive material, such as nanocrystals... photosensitive material is a continuous film of interconnected nanoparticles
Data Source
AI summary
In various exemplary embodiments, optically sensitive devices comprise a plurality of pixel regions. Each pixel region includes an optically sensitive layer over a substrate and has subpixel regions for separate wavebands. A pixel circuit comprises a charge store and a read out circuit for each subpixel region. Circuitry is configured to select a plurality of subpixel elements from different pixels that correspond to the same waveband for simultaneous reading to a shared read out circuit.


