Quantum Gate Logic Design for Edge Device Circuit Reduction

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Solution Overview

Problem

Devices such as satellites and drones in complex multi-domain battlespaces face limitations in size, weight, power, and cost (SWaP-C), making it challenging to add additional circuitry for enhanced functionalities.

Innovation Solution

The method involves transforming traditional combinatorial logic gate designs into quantum gate logic designs using algorithms that map polynomials representing the operation of combinatorial logic gates into orthonormal quantum polynomials, thereby reducing the circuitry required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If additional circuitry is added to enhance device functionalities, then device functionality is improved, but device size, weight, power consumption, and cost increase

Engineering Contradiction:

Improvedevice functionalityVSAvoiddevice weight

Core Design Contradiction:

Adaptability or versatilityVSWeight of moving object

Solution Approach 1:

The patent transforms the physical implementation parameters of logic circuits from classical transistors to quantum components, fundamentally changing the operational paradigm. This parameter change enables enhanced functionality while reducing the physical footprint and resource requirements, as quantum gates can perform multiple logical operations simultaneously through superposition and entanglement phenomena.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent replaces classical mechanical/electrical circuit systems with quantum mechanical systems. By substituting traditional logic gates with quantum gate equivalents that utilize quantum phenomena (superposition, entanglement, interference), the system achieves the same or enhanced functionality with reduced physical complexity, weight, and power consumption.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If additional circuitry is added to enhance device functionalities, then device functionality is improved, but device complexity increases

Engineering Contradiction:

Improvedevice functionalityVSAvoidcircuit complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements universal quantum gate designs that can perform multiple logical functions through quantum superposition and entanglement. A single quantum gate structure can simultaneously execute multiple classical logic operations, eliminating the need for separate dedicated circuitry for each function, thereby reducing overall circuit complexity while maintaining versatility.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple classical logic gate functions into unified quantum gate structures. By combining the functionality of multiple classical gates (AND, OR, NOT, etc.) into a single quantum gate implementation that leverages quantum parallelism, the system reduces the number of discrete components and interconnections required, thus reducing circuit complexity.

Inventive Principle:

Principle #5Merging (Combining)

3Adaptability or versatility

If additional circuitry is added to enhance device functionalities, then device functionality is improved, but power consumption increases

Engineering Contradiction:

Improvedevice functionalityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent exploits the continuous nature of quantum states and quantum parallelism to perform multiple logical operations simultaneously within a single quantum gate structure. This continuous quantum processing eliminates the need for sequential switching and repeated state transitions required in classical circuits, significantly reducing dynamic power consumption while maintaining enhanced functionality.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS20250131301A1Gate reduction at distributed edge devices or other devices

Publication Date: 2025.04.24 RAYTHEON CO

AI summary

A method includes obtaining, using at least one processing device of an electronic device, information defining a combinatorial logic gate design for a combinatorial logic circuit. The method also includes generating, using the at least one processing device, one or more polynomials representing operation of the combinatorial logic gate design. The method further includes mapping, using the at least one processing device, the one or more polynomials to one or more quantum polynomials, where each quantum polynomial has terms that are orthonormal. In addition, the method includes generating, using the at least one processing device, a quantum gate logic design based on the one or more quantum polynomials, where the quantum gate logic design is functionally equivalent to or better than the combinatorial logic gate design for the combinatorial logic circuit.