Quantum Gate Formation Using Parametric XY Decomposition
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Solution Overview
Problem
Noisy Intermediate-Scale Quantum (NISQ) devices face limitations in computational power due to high gate error rates and restricted qubit connectivity, which restricts the depth and fidelity of implemented circuits.
Innovation Solution
The implementation of a more expressive gate set, specifically the XY gate family, which allows for arbitrary entangling strength with precise control over the phase β, reducing circuit depth and gate errors. This is achieved through a gate decomposition strategy that calibrates a single flux pulse and maintains constant gate time for all entangling angles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standard gate set is used with fixed connectivity, then device structure is simple, but circuit depth increases and gate fidelity decreases
Solution Approach 1:
The patent applies parameter changes by introducing a continuous parameter β (beta) that controls the entangling strength of the XY gate. By varying β from 0 to π, the gate can achieve different levels of entanglement, allowing optimization of circuit depth and fidelity without changing the physical device structure. This parameter control enables the same hardware to perform multiple gate functions with different connectivity requirements.
Solution Approach 2:
The patent implements dynamics through the time-dependent flux pulse that controls the coupling between qubits. The flux pulse duration and amplitude are dynamically adjusted to achieve the desired entangling angle β, allowing the system to transition between different gate configurations on-demand rather than being fixed hardware-wise.
2Productivity
If circuit depth is increased to compensate for restricted connectivity, then computational power increases, but gate errors accumulate
Solution Approach 1:
By changing the entangling parameter β, the patent enables more direct quantum pathways between qubits that are not physically adjacent. This reduces the number of SWAP gates needed, thereby reducing circuit depth and preventing error accumulation while maintaining computational capability.
Solution Approach 2:
The XY gate with variable β acts as an intermediary mechanism that facilitates indirect qubit interactions. Instead of requiring direct physical connectivity or multiple intermediate gates, the variable β XY gate mediates the interaction, effectively reducing circuit depth while maintaining computational power.
3Adaptability or versatility
If multiple flux pulses are calibrated for different entangling angles, then gate versatility increases, but calibration complexity and time increase
Solution Approach 1:
The patent achieves universality by demonstrating that a single flux pulse calibration can control the entangling angle β across the full range from 0 to π. This single calibration procedure enables the system to perform multiple different entangling operations without requiring separate calibrations for each angle, reducing calibration complexity while maintaining full versatility.
Solution Approach 2:
The flux pulse is designed with periodic characteristics where the phase β can be controlled by the pulse duration and timing. This periodic control mechanism allows the same physical pulse configuration to achieve different entangling angles through phase modulation, reducing the need for multiple distinct calibration procedures.
Data Source
AI summary
In a general aspect, a gate is formed for a quantum processor. In some implementations, an arbitrary program is received. The arbitrary program includes a first sequence of quantum logic gates, which includes a parametric XY gate. A native gate set is identified, which includes a set of quantum logic gates associated with a quantum processing unit. A second sequence of quantum logic gates corresponding to the parametric XY gate is identified, which includes a parametric quantum logic gate. Each of the quantum logic gates in the second sequence is selected from the native gate set. A native program is generated. The native program includes a third sequence of quantum logic gates. The third sequence of quantum logic gates corresponds to the first sequence of quantum logic gates and includes the second sequence of quantum logic gates. The native program is provided for execution by the quantum processing unit.