Protected Quantum Interconnect Layout Using TSVs and Cap Wafer Shielding
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Solution Overview
Problem
Current quantum computing technologies face challenges in protecting quantum information and mitigating errors due to limited high-quality surfaces for qubit connections, leading to increased signal crosstalk and reduced coherence times, especially when attempting to couple distant qubits.
Innovation Solution
The use of superconducting through-silicon vias (TSVs) connected to the back side of a qubit or interposer wafer, with a metal-bonded cap wafer forming a fully enclosed metal channel for long-range connections, allowing for a second interconnect layer and reducing crosstalk by shielding bus lines within a Faraday cage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If only two high-quality surfaces are used for qubit connections with vertical bump bonds, then the structure is simple, but the ability to connect distant qubits is limited and signal crosstalk increases
Solution Approach 1:
The patent utilizes the back side of the qubit chip as a third dimension for interconnects. Through-silicon vias (TSVs) provide vertical connections from the front surface to the back surface, enabling a second interconnect layer on the back side of the chip. This third-dimensional approach allows distant qubits to be connected without requiring complex crossover patterns on the same plane, thereby increasing adaptability while managing complexity.
Solution Approach 2:
The interconnect structure is segmented into multiple independent layers: front-side interconnects, back-side interconnects, and vertical TSV connections. This segmentation allows each layer to be optimized independently and enables complex coupling schemes to be distributed across multiple layers rather than concentrated on a single plane, reducing signal crosstalk and improving versatility.
2Reliability
If bump bonds are used to provide crossovers for distant qubit connections, then connections can be established, but signal crosstalk increases and coupling quality decreases
Solution Approach 1:
By moving interconnects to the back side of the chip through TSVs, the patent creates spatial separation between front-side qubits and back-side interconnects. This dimensional separation reduces electromagnetic coupling between signal lines and qubits, thereby reducing signal crosstalk and improving coupling quality for distant qubit connections.
Solution Approach 2:
The TSVs act as intermediary structures that transmit signals from the front surface to the back surface of the chip. This intermediary approach allows clean signal transmission without requiring complex crossover patterns on the same plane, reducing signal degradation and crosstalk while maintaining coupling quality.
3Adaptability or versatility
If a second set of connections is added to more distant qubits on the same surface, then more qubits can be coupled, but layout complexity increases greatly
Solution Approach 1:
The patent resolves layout complexity by utilizing the back side of the chip as an additional dimension for interconnect routing. TSVs provide direct vertical pathways that simplify the layout of long-range connections, eliminating the need for complex crossover patterns and multiple routing layers on the front surface, thereby enabling versatile qubit coupling with manageable layout complexity.
4Reliability
If conventional packaging with two chips and bump bonds is used, then manufacturing is straightforward, but coherence times are reduced due to limited shielding
Solution Approach 1:
The patent utilizes the back side of the qubit chip to create a three-dimensional structure with front-side qubits, back-side interconnects, and TSV connections. This 3D architecture enables the formation of Faraday cage structures that provide electromagnetic shielding for quantum signals, thereby extending coherence times while maintaining manufacturability through standard TSV and bump bond processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the quality of interconnects by providing a high-Q factor, reducing signal crosstalk, and enabling more complex interaction schemes between qubits while maintaining high-quality connections, thus improving the coherence times and scalability of quantum computations.
Implementation Method 1
A first chip layer front-side is operatively coupled to a qubit chip layer front-side with a set of bump-bonds. A set of through-silicon vias (TSVs) are connected to at least one of: a first chip layer back-side or a qubit chip layer back-side
Implementation Method 2
a metal bond is used to attach a special cap wafer at a top of a thinned qubit wafer, forming a fully enclosed metal channel in which long-range connections are fabricated
Implementation Method 3
Superconducting qubits offer a promising path towards constructing fully-operational quantum computers as it can exhibit quantum-mechanical behavior (e.g., facilitating quantum information processing) at a macroscopic level
Data Source
AI summary
A semiconductor device comprises a first chip layer, having a first chip layer front-side and a first chip layer back-side, a qubit chip layer, having a qubit chip layer front-side and a qubit chip layer back-side, the qubit chip layer front-side operatively coupled to the first chip layer front-side with a set of bump-bonds, a set of through-silicon vias (TSVs) connected to at least one of: the first chip layer back-side or the qubit chip layer back-side and a cap wafer metal bonded to at least one of: the qubit chip layer back-side or the first chip layer back-side.