Quantum-Layer FET Structure for Steep-Slope Switching
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Solution Overview
Problem
Current semiconductor technologies, such as CMOS, face limitations in miniaturization due to subthreshold swing (SS) constraints, which hinder further performance and power improvements, as they struggle to achieve high on-state current density, low SS values, high on/off ratios, and reduced voltage supply without performance loss.
Innovation Solution
The development of field effect transistors (FETs) incorporating distinct or similar quantum layers over oxide layers, with specific segmentations and configurations, to enhance steep-slope switching capabilities, potentially leveraging materials like molybdenum disulfide and graphene, and forming heterostructures to improve channel region performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional CMOS miniaturization continues, then device density increases, but subthreshold swing constraint prevents further performance improvement
Solution Approach 1:
The patent changes the fundamental transport mechanism parameter from thermionic emission to quantum tunneling, enabling subthreshold swing below the thermal limit of 60mV/decade. This parameter change in the charge carrier transport mechanism allows continued performance improvement at scaled dimensions where conventional CMOS fails.
Solution Approach 2:
The patent replaces the classical thermionic emission mechanism with quantum mechanical tunneling effect. This substitution of the underlying physical mechanism enables the device to overcome the thermal limit and achieve steep slope switching with sub-60mV/decade subthreshold swing.
2Reliability
If TFET band-to-band Zener tunneling is used to achieve sub-60-mV/decade SS, then subthreshold swing improves, but on-state current density remains insufficient
Solution Approach 1:
The patent applies local quality by creating a triangular gate structure where different regions provide different functions: the gate underlap region enables band alignment for efficient tunneling, the vertical gate section provides strong electric field for high current, and the gate overlap region ensures proper gate control. This spatial variation in structure quality simultaneously achieves low SS and high on-state current.
Solution Approach 2:
The patent employs composite material structure combining semiconductor layers (e.g., InGaAs, InP) with specific band structures. The heterostructure design with different bandgap materials enables optimized band alignment for tunneling while maintaining high carrier mobility for on-state current, resolving the contradiction between low SS and high current.
3Reliability
If NCFET ferroelectric gate layer is used to lower body factor, then subthreshold swing improves, but device complexity increases
Solution Approach 1:
The patent segments the gate into three distinct regions (underlap, vertical, and overlap sections) with different geometries and functions. This segmentation allows each region to be optimized independently for its specific role, achieving low subthreshold swing through the underlap region while maintaining simplicity in other areas.
Solution Approach 2:
The patent transitions from a planar gate structure to a three-dimensional triangular gate configuration. This dimensional change enables the gate to achieve both strong control (for low SS) and high current drive (for on-state current) by utilizing vertical field enhancement in the triangular geometry without requiring complex ferroelectric materials.
4Loss of energy
If voltage supply is reduced to improve power, then power dissipation decreases, but on-state current density drops
Solution Approach 1:
The patent replaces thermionic emission with quantum tunneling as the dominant transport mechanism. Since tunneling current is less sensitive to voltage variations than thermionic emission, the device can operate at reduced voltages with maintained on-state current density, thereby reducing power dissipation without sacrificing productivity.
Solution Approach 2:
The patent changes the transport mechanism parameter from thermionic emission to quantum tunneling, which fundamentally alters the current-voltage relationship. This parameter change enables the device to achieve high on-state current at lower voltages, resolving the contradiction between power reduction and current maintenance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These FET designs aim to overcome SS limitations, achieving higher on-state current density, sustained low SS values across multiple decades, and reduced voltage supply while maintaining performance, thereby advancing nanoelectronics beyond conventional CMOS capabilities.
Implementation Method 1
the tunneling transistors (TFETs) based on quantum-mechanical tunneling effect
Data Source
AI summary
Field effect transistors (FET) including quantum layers. A FET may include a substrate, and an oxide layer disposed over the substrate. The oxide layer may include a first section and a second section positioned adjacent the first section. The FET may also include a first quantum layer disposed over the first section of the oxide layer, and a second quantum layer disposed over the second section of the oxide layer, and a first segment of the first quantum layer. Additionally, the FET may include a drain region disposed directly over a second segment the first quantum layer. The second segment of the first quantum layer may be positioned adjacent the first segment of the first quantum layer. The FET may further include a source region disposed over the second quantum layer, and a channel region formed over the second quantum layer, between the drain region and the source region.